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Circuit Surgery Regular clinic by Ian Bell Measuring circuit frequency response using a PC sound card, part 10: differential amplifiers and line drivers I n this series, we have been looking at circuit frequency response, including a measurement system using the ‘sound card’ (audio interface) of a PC or laptop together with free software called REW (Room EQ Wizard). This was motivated by the need to measure the response of a practical implementation of an example digital filter (from our series on DSP) without using advanced lab test equipment. Over the last few months, we have described parts of the signal conditioning circuitry that might be needed to interface the circuit under test to the sound card’s line inputs and outputs. Last month, we started looking at the THAT1646 balanced line driver, which produces the output to the sound card in our circuit. We introduced that device previously but mainly focused on the basic principles of balanced lines and differential signals. We also looked at some problems with simulating them. This month, we will go over more details of the THAT1646 and discuss differential amplifiers in general. As with our previous discussions, these topics have wider applicability than just the frequency response measurement system. The THAT1646 audio differential line driver is available in DIP-8, SO-8 and SO-16W (SO-16 comes in narrow and wide [W] variants) packages. Fig.1 shows the internal circuit structure and pinout for the DIP-8 and SO-8 versions. The resistors and capacitors form the feedback network, which is significantly more complex than a basic op amp amplifier due to there being two outputs and the need for both commonmode and differential feedback. The SNS± inputs can be directly connected to their respective outputs, but connecting them via capacitors reduces the common-mode output (as described in the datasheet). The THAT1646’s internal circuitry uses a fully differential amplifier, with differential inputs and outputs. However, one of its 5kΩ input resistors is internally grounded, 34 so the input to the THAT1646 is singleended. A similar device, the THAT1606, has both differential inputs and outputs. THAT1646 simulation Fig.2 shows an LTspice simulation for a minimal THAT1646 circuit that we started to investigate last month. The 100kΩ load resistors (R1 and R2) and input buffer amplifier (U1) provide more realistic conditions than directly driving the device from an ideal source and leaving the outputs unloaded. An input buffer would be needed in many real designs, THAT 1646 6 Vcc 10k 1 Out- 25 CEXT 4 In+ 5k 3 Gnd 5k 10k Din+ Cin+ Dout- 10k Dout+ 10k 20k CinDin- 10k 5 Vee 10p Sns2 10k 25 20k 7 Sns+ CEXT Out+ 8 Fig.1: the circuit structure and pinout of the THAT1646 (from the device data sheet). Fig.2: an LTspice schematic for simulating the THAT1646. Practical Electronics | July | 2026 as the THAT1646 has a relatively low input impedance of about 5kΩ. Last month, we presented some transient simulation results but discussed concerns with a slow simulation rather than the results themselves. Fig.3 shows transient simulation results. The top plane shows the single-ended input of the THAT1646 (the Buf signal from the buffer), the individual outputs are shown in the middle pane (green outp and yellow outn traces) and the differential output in the lower plane. The differential output trace is obtained by plotting V(outp)-V(outn) using the waveform maths. All the panes in Fig.3 have the same voltage scale, so it is straightforward to see that the outp signal and buf signals are equal (1V peak sinewave), that is, the THAT1646’s Out+ output has a unity non-inverting gain. Similarly, the THAT1646’s Out- output (on the net outn) has unity inverting gain. The differential signal thus has twice the amplitude of the two individual signals (this is the nature of differential signals). So, the gain of the THAT1646 to its differential output is 2. There is minimal phase shift (not visible on the timescale used in Fig.3). Results from the AC analysis are shown in Fig.4. Unlike the transient simulation, this was obtained by driving the THAT1646 directly from the V1 source (signal In connected to the THAT1646’s In pin). This is easily achieved by changing the net label on the wire connected to the THAT1646’s input. It is useful to draw LTspice schematics with subcircuits connected by name, rather than drawn wires, as this makes ‘rewiring’ to run alternative simulations easier. In LTspice, nets with the same name are connected; you do not always have to draw wires to connect components. The THAT1646 was driven directly from V1 for this simulation because an AC Fig.3: the transient analysis results from simulating the circuit in Fig.2. analysis is more idealised than transient analysis, and we are more interested in the device’s raw characteristics than its performance in a typical circuit situation. The bandwidth of the OPAx134 is fairly close to that of the THAT1646, so the OPAx134 will influence the overall frequency response if it is included. You can easily run the analysis with and without the OPAx134 to compare them. You will find that the overall cutoff is sharper with the OPAx134 in place because it has slight gain peaking that coincides with frequencies just below the THAT1646’s cutoff. In Fig.4, the top trace shows the individual outputs and the lower trace the differential output, with the same colours as in Fig.4. The single-ended gains are very close to unity (0dB), while the differential gain is close to 2× (+6dB), at 5.97dB. Note that the gain range plotted is small (-1dB to +1dB), which allows us to see a small variation in gain of the individual outputs (a difference of about 0.2dB). This variation is symmetrical, so it is cancelled and does not appear in the differential plot. As mentioned last month, differential circuits can cancel some of their own imperfections as well as being an essential component in interference-cancelling balanced connections. From Fig.4, we can observe that the gain and phase responses are both very flat to well over 1MHz. A look at an expanded gain range (to see the -3dB points) indicates a bandwidth of around 10MHz, which is consistent with the datasheet value. 5-year collections 2019-2023 £49.95 2018-2022 £49.95 2017-2021 £49.95 2016-2020 £44.95 Purchase and download at: www.electronpublishing.com Fig.4: the AC analysis results from simulating the circuit in Fig.2 with R1=R2=100kΩ. Practical Electronics | July | 2026 35 Fig.5 shows the AC simulation with the load resistors reduced from 100kΩ to 600Ω. The gain has dropped by 0.35dB from 5.97dB to 5.62dB. This is due to the higher loading presented by the 600Ω resistors. Fig.6 shows transient simulation results with the one output (outn) shorted to ground. This was achieved by setting the value of R2 to 1mΩ (R1 is 100kΩ, as for the result in Fig.3). It is convenient to do this rather than connecting the THAT1646’s OUT- pin directly to ground as it involves fewer circuit changes, is more realistic and means we can keep the same plot setup (if we short the output, the net outn no longer exists). The input is the same as previously (a 1V peak 1kHz sinewave), and despite one output being shorted, the differential output (lower pane in Fig.6) is the same as in Fig.3 (2V peak), showing that the gain is unchanged. The upper pane shows that outn is at 0V as expected, and outp is 2V peak, rather than the 1V without the short circuit. This shows that the THAT1646 is behaving as a floating output, the same behaviour as exhibited by an output transformer, as discussed last month. Fig.5: the AC analysis results from simulating the circuit in Fig.2 with R1=R2=600Ω. Input and output impedance The loading of one circuit (the source) by another (the load) is a common challenge in electronics. The source may be the output of a circuit, such as an amplifier or filter, or it may be a sensor, such as a microphone or photodiode. It could also be a power source, like a battery. The load may be the input of a circuit such as an amplifier or filter, a transducer such as a loudspeaker or motor, or the circuit or device connected to a power supply. The output of any circuit between two terminals can be represented by an ideal output voltage source (vO in Fig.7) in series with an output (or internal) impedance (ZO in Fig.7). The load can be represented as a single impedance (ZI Fig.7). The voltage (signal) between the load and the source is shown as vs in Fig.7. The term output impedance is usually used for signal sources, while internal impedance is used for power sources. In many cases, for both the source and input, we can use resistance instead of impedance to ZO Out VS In VO ZI Source Load Fig.7: a generic source and load equivalent circuit. 36 Fig.6: the transient analysis results of the circuit in Fig.2 with outn shorted to ground. simplify the situation, particularly if there is little frequency dependence over the range of interest. The output impedance of a circuit may be dominated by obvious components such as an output resistor or coupling capacitor, but often it is a complex function of the properties of the circuit as a whole. The representation in Fig.7 is an equivalent circuit, which is a simple model of how the circuit behaves. The source equivalent circuit is based on Thévenin’s theorem and strictly only applies to linear circuits, but we often simplify situations by assuming linearity. For example, AC analysis is based on linearised circuit models. We can also model an output as a current source in parallel with an impedance or resistance (a Norton equivalent circuit) if that is more convenient. In Fig.7, we see that the input and output impedances act as a potential divider, reducing the signal voltage on the connection (vs ) with respect to the internal source output (vO ). Using the potential divider formula vs = ZIvO ÷ (ZI + ZO). This is the loading effect – for maximum signal amplitude transfer, we need ZI to be large and ZO to be small. If we have ZI = ZO, the connection is matched. The voltage is attenuated by half, but we get maximum power transfer. Matching is required where the connection is more than about 1/10th the wavelength of the signal, but this is in the order of kilometres at audio frequencies, so it is rarely a concern. There is some legacy of 600Ω matching from old telephony systems in audio, but usually we need maximum amplitude transfer for signal connections. An equivalent circuit for a singleended connection with a driver output impedance (ZO) and receiver input impedance (ZI) is shown in Fig.8. This is very similar to Fig.7, but we have added the receiver amplifier symbol as a reminder of how the input is connected. There is also an interfering voltage source in the ZO Out VS In ZI VO Driver Receiver Vint Fig.8: source and load equivalent circuits for a single-ended line driver & receiver. Practical Electronics | July | 2026 ZOD/2 VD /2 VD /2 ZCM ZOD/2 Vp Out+ VS VO ZOD/2 Vp ZOD/2 Out– Vn ZOD/2 In+ In– VD /2 Vn VCM Fig.9: a possible differential plus common-mode source model. ground connection between the driver and receiver (vint). We discussed interfering signals in depth last month – balanced lines can provide good interference rejection, whereas this is not possible for singleended lines unless the frequency ranges of the wanted and unwanted signals have no overlap. In Fig.8, we see that the interfering signal is in series with the source output, so effectively they behave as one source. Note that we use the receiver ground as the reference point, as we are interested in the integrity of the signal at the receiver. Balanced line equivalent circuit The equivalent circuit for a balanced line driven by a differential output is more complex than Fig.8. Last month, we discussed common-mode and differential signals, and it follows that we can have both differential and common-mode input and output impedances. Fig.9 shows a possible representation of these impedances based on the differential plus common-mode source model discussed last month. In Fig.9, the differential output impedance (ZOD) is split to match the split in the differential source (vD), but like the basic model in Fig.7, it is in series with the sources. Similarly, the common-mode source has a series impedance (ZCM). The common-mode source and impedance in Fig.9 naturally relate to the common-mode signal produced internally by a line driver amplifier. If Fig.9 represents a fully differential amplifier output, then vCM would reflect its inability to perfectly reject common-mode inputs, so we could refer to this as input-related common-mode rejection. Input common-mode rejection is important, but our main concern in our recent discussion of balanced lines was interfering signals that directly couple to vp and vn as common-mode signals external to the driver. Fig.10 shows an equivalent circuit for a floating output differential/balanced driver and receiver connection, which includes common-mode signals introduced at the output. Practical Electronics | July | 2026 ZOCP ZOCN ZCM VD /2 ZID ZICN Driver Vp ZOD/2 Vn ZCM ZICP Receiver Fig.11: an equivalent circuit for balanced differential output (with no common-mode signal). VCM Fig.10: a source and load equivalent circuit for a balanced/differential line driver and receiver. In Fig.10, the driver has common-mode output impedances to ground from each output, while the receiver has commonmode input impedances to ground from each input. These form two parallel potential dividers across the commonmode signal. If the two output and two input common-mode impedances are both equal (ZOCP = ZOCN and ZICP = ZICN), the line will be balanced and the voltage contributions to vp and vn from the common-mode source will be equal. As discussed last month, this will minimise the interference picked up by the receiver, assuming the receiver is able to reject common-mode signals (more on common-mode rejection later). From the perspective of the differential output, the driver common-mode output and receiver common-mode input impedances are in parallel. For the results in Fig.5, we can assume that the 600Ω load resistors are small enough to dominate the parallel value, so we can ignore ZOCP and ZOCN, and thus we have ZICP = ZICN = ZCM = 600Ω. If ZID is large compared to the other impedances, it will have relatively little impact (note that in the Fig.2 circuit, ZID is not present). With these assumptions, we can draw an equivalent circuit for the differential output as shown in Fig.11. This does not include any common-mode signals; we are just considering the differential component here. We see that ZOD/2 and ZCM form potential dividers with respect to both halves of the differential output. The two halves of the differential signal will be attenuated by the potential divider factor, so the differential signal as a whole will be attenuated by the same factor. From the THAT1646 datasheet, its output impedance is 40-60Ω. The two 25Ω resistors in Fig.1 correspond to the ZOD/2 resistors in Fig.9 for a nominal output impedance of 50Ω. The attenuation seen in Fig.5 is 0.35dB, which is a factor of 10(0.35 ÷ 20) = 0.9605. This means, for the potential divider, ZCM ÷ (ZCM + ZOD/2) = 0.9605, from which we find ZOD = 49Ω. This is nearly exactly the THAT1646’s maximum specified output impedance, in spite of the assumptions we made; a good result. The common-mode output impedance of the THAT1646 in parallel with 600Ω would reduce the effective value of ZCM and lead to a lower estimated value of ZOD if we took account of it. Capacitive loads In recent months, we discussed problems with driving capacitive loads using op amps in some detail. As well as its handling of differential signals, an advantage of the THAT1646 for driving the output of the frequency response measurement circuit is its ability to drive large capacitive loads without being destabilised. Balanced audio cables commonly use a shielded twisted-pair (STP) structure. The two signal lines are carried on a twisted pair, which is shielded to reduce interference coupling to the signal wires. Using a twisted-pair structure ensures any interference coupling is equal on both wires and can be rejected by the line receiver. These cables have both a conductor-­ to-conductor capacitance (C cc ) and conductor-to-shield capacitance (Ccs) – see Fig.12. From the perspective of the differential output, the two Ccs capacitances are in series so have an effective capacitance of Ccs/2. The series shield capacitances are in parallel with the conductor-to-­ conductor capacitance. That means the total capacitance seen by the differential output is Ccc + Ccs/2. The capacitance values are usually specified per unit length (eg, in pF/m). Fig.13 shows an LTspice schematic Vp Shield Ccc Vn Ccs Ccs Fig.12: the capacitances on STP cable connected to a line driver. 37 that’s similar to Fig.2 but with a capacitive load added, specifically a Ccc of 20nF and a Ccs of 20nF on each output. This is equivalent to an audio cable with a length in the low hundreds of meters, although of course part of the load capacitance will also come from any inputs to which the signal is connected. This simulation was configured to drive the THAT1646 directly from the V1 source, which is producing fastedged pulses. The OPAx134 produces a small amount of ringing with this input, so this avoids any influence from it. The op amp is kept in the circuit, as it is useful to also be able to rewire to see the behaviour of the circuit with a more realistic input to the line driver. The results from the transient simulation are shown in Fig.14. The upper pane shows the input, the middle pane the two individual outputs, and the lower pane shows the differential output in a similar arrangement to Fig.3. Fig.15 provides zoomed-in detail of the step response and shows the input multiplied by two on the same pane as the output. The results show that the THAT1646 is able to drive the capacitive load without any stability problems. Fig.15 shows that the response has no ringing and is slightly damped. Fig.16 shows the AC analysis results on the same scale as Fig.4. The capacitive load reduces the bandwidth (to about 107kHz), as would be expected, but does not cause any significant change in the shape of the response. In particular, there is none of the gain peaking that we saw in recent articles concerning op amps that had difficulty driving capacitive loads. The datasheet states that the THAT1646 is stable with any capacitive load, but some factors other than stability must be considered. As seen by comparing Fig.4 and Fig.16, capacitive loads reduce the bandwidth and the slew rate (output rate of change), which is related to the current drive capability. This needs to be taken into account. Changing the voltage on a capacitor requires current – the faster the change or the larger the capacitance, the more current is required. If the current demand is too large, the THAT1646 will enter output current limiting and it will not be able to keep up with the waveform changes, resulting in distortion. The THAT1646 datasheet provides more details on this with an example. Their example is similar to the situation in Fig.13 and is well within the THAT1646’s capabilities. 38 Fig.13: an LTspice schematic for simulating the THAT1646 IC with a capacitive load. Fig.14: the transient analysis results from simulating the circuit in Fig.13. Fig.15: details of the waveform step edges from Fig.14. Difference & differential amps The THAT1646 contains a differential amplifier, and for a line driver and receiver combination to work well for a balanced line, we also need a good differential amplifier in the receiver. It is therefore useful to look in a bit more depth at the design and properties of these circuits. Fig.17 shows a standard op amp based differential amplifier, which has a differential input and single-ended output. As with all op amp based amplifiers, negative feedback is applied to a very Practical Electronics | July | 2026 R2 R1 Vin – VO + Vip R3 R4 Fig.17 an op amp based differential amplifier (difference amplifier). R2 Vdin Vdip Vip – + – + R1 Vin Vdop Vdo Vdon R3 R4 Fig.18: a fully differential amplifier. Fig.16: the AC analysis results from simulating the circuit in Fig.13. high-gain op amp to set the gain of the circuit. Fig.18 shows a fully differential amplifier comprising a fully differential op amp and two feedback networks. This is similar to a standard op amp circuit, except that the very high-gain amplifier has differential outputs as well as differential inputs. As with standard op amp circuits, the feedback resistors set the gain. Negative feedback is applied via both inputs (from positive out to negative in, and negative out to positive in). Both the circuits in Fig.17 and Fig.18 can be called differential amplifiers, but the terms difference amplifier (Fig.17) and fully differential amplifier (Fig.18) are used to distinguish them. Difference amplifier operation The difference amplifier in Fig.17 can be considered as a combination of a standard inverting and non-inverting amplifier, with resistors R3 and R4 acting as a potential divider on the input of the non-inverting amplifier (the standard circuit feeds the input directly to the op amp). We can use a key piece of circuit theory called superposition to analyse the inverting and non-inverting aspects of the circuit separately. For linear circuits, we can use superposition to deal with multiple sources – we set all sources except one to zero and find the effect of that source on its own (for example, its contribution to output voltage), then repeat with the other sources. Finally (because the circuit is linear), we can add up the individual contributions. If we set vip = 0, the circuit in Fig.17 acts as an inverting amplifier with respect to vin. Resistors R3 and R4 are in parallel, connecting the non-inverting input to Practical Electronics | July | 2026 ground, and do not affect the gain. The gain with respect to vin is -R2 ÷ R1, in accordance with the standard inverting gain formula, so vin makes a contribution to vo of -(R2 ÷ R1) × vin. If we set vin = 0, the circuit in Fig.17 acts as a non-inverting amplifier, for which the gain is 1 + R2÷R1, using the standard gain formula. We can also write the gain as (R2 + R1) ÷ R1. The input signal (vip) is applied via the potential divider formed by R3 and R4, so to find the output, we multiply vip by the potential divider formula and the gain. Therefore, vip makes a contribution to vop of (R4 ÷ (R3 + R4)) × (1 + R2 ÷ R1) × vip. The output from the circuit is the sum of these two contributions. If we choose R3 = R1 and R4 = R2 and substitute R1 and R2 for R3 and R4 in the vip contribution stated above, we get the overall output as: ( ( )( ) ( ) )(( ) ) ( ) ( () ) ( ) R2 R1 + R2 R v ip − 2 v in R1 + R2 R1 R1 R R + R R 2 2 The (R2+R12) terms R 21 cancel v o= v and − the vequav −vipin ) R 1 in R 1 +vRo = tion simplifies 2 to: R(1 ip R1 R D v o34= 2 ( v ip −v in ) v o= R( 1+ D 12 ) v ip −D 12 v in 1+ D 34 1 The circuit D 34amplifies the difference v o =D(12 −v ( vDipa12 v o =its inputs 1+ vinip)−D )gain between by of12Rv2in ÷ R1. 1+ D 34 Using equal resistors, as stated above, v do = A D [ ( F 12 v don + F 21 v ip )−( F 12 v dop + F 21 v in ) ] v o =D gives difference amplification, but equal12 ( v ip −v in ) v do =ofA Dthe v don −F 12is v dopnot −F 21way v in ) ] ) + ( Fthe [ ( F 12resistors ity only 21 v ip v = A D [ ( F 12 v don + F 21 v ip )−( F 12 v dop + F 21 v in ) ] todo approach this. The use of ratios of v do = A D [−F 12 v do + F 21 ( v ip −v in ) ] component can also be an imv do = A D [ ( F 12 vvalues don −F 12 v dop ) + ( F 21 v ip −F 21 v in ) ] v do portant factor in circuit design and is +D [F−F =F v do = F(21v ip( v−v 12 v12 dov in ) in ) ] do +21 ip −v significant here. AA D The circuit has two potential dividv do +R F2 12 vFdo21the =F v −v ( ) ers, R1 and for feedback, and R3 21 ip in v = v −v ( ip in ) A D do 12 define the two diand R4 for vip. IfFwe F vider resistor D12 = R2÷R1 and vvdoratios = R212 ((vas v −v ) do = FR12 ipip−v inin) of vin to the D34 = R4÷R3, the contribution 1 output is D12vin. R 2 G+1 vCMRR vnote −v that ) For v ip , we firstR(= we can do = R 1 ip 4 T in v o= CMRR R = G+1 4T write the potential divider formula R4 ÷ R 24 ÷ R3R (R3+R4) as (R )÷(1 divid1 + R+ 2 R4÷R3)Rby v o= v − 2 v in ing both the R 1 +numerator R2 R 1 andip denominator R1 by R3. This can be written as D34 ÷ (1 + R 2 ratio. We can then D34) using the divider v o= ( v ip −v in ) Rvoltage write the output as: R2 R11 + R 2 expression R v o= v ip − 2 v in R 1 +DR342 R1 R1 v o= ( 1+ D 12 ) v ip −D 12 v in 1+ D 34 R v o = 2 ( v ip −v in ) Equal resistances of R3 in=) R1 and R4 = R12 v o =D 1 ( v ip −v R2 mean that D12 = D34, so (1 + D12) canv do = A vvdon + F v )] ( F 12D )−( F 12 v dopequation [the 34 + F 21 v ipand cels in ip term, vDo = −D 12 v in 21 in ( 1+ D 12 ) v ipthe 1+ D 34 simplifies to: v do = A D [ ( F 12 v don −F 12 v dop ) + ( F 21 v ip −F 21 v in ) ] v o =D 12 ( v ip −v in ) v do = A D [−F 12 v do + F 21 ( v ip −v in ) ] also get v doWe = Acould F 12substituting v dop + F 21 v in ) ] D [ ( F 12 v don + F 21 vthis ip )−(by v do D12 into the expression + F 12 v do =F 21for v ipv−v ( ) the full o but v do = A D [ ( F v dop )D + ( F 21 vinuseful Ausing 12 ip −F 21 vbein ) ] D v don −F equation D1212and is 34 cause vit = shows usF 21 that the( vinput-output A D [−F do 12 v dov+ F 21 ( −v )ip −v in ) ] do = relationshipvdepends F 12 iponlyin on the resistor ratios,v donot their absolute values. + F on 12 vR do =F 21 ( v ip −v in ) Equality AofD the ratios v do = 2 ( v ipwill −v in )provide corR 1if the absolute rect operation even values F v do = 21 ( v ipG+1 −v in ) are not equal. F 12R = CMRR This is important because 4 T some fabrication techniquesRmay be able to provide 2 v do = ( v ip −v in ) R 1 than it can control better ratio matching absolute values. We will G+1 discuss this more shortly.CMRR R = 4 T ( )( ) ( ) ( ) ( )( ) ( ) ( ) ( ) ( ) The THAT1240 series Although the focus of this article is line drivers, it is worth mentioning balanced line receivers. Examples include the INA134 and INA137 from Texas Simulation files Most Circuit Surgery columns feature the use of the free circuit simulation software LTSpice. It is used to support descriptions and analysis in Circuit Surgery. The examples and files for this issue are available for download: https://pemag.au/link/acbx 39 ( )(( ) ) ( ) ( ()( )( ) ) ([( )( ( ) )( ) )( ( )) ( ) ( ) [(( ) ( [( [ ( )( ) (( ) )] [( ( [ )( ( )() ( ( ) ))] ( ) ( )((( ( ))) ) [( (( ) ( )) ( ) ( ) ) ( [( v o= v ip − v in ( v −v ) R 1 +vRo = 2 R 1 R 1 ip in R 1 R2 D v o34= 1+ v ip12−v D v ipin−D 12 v in 1+ D 34 R 1 Rearranging to get the inputs and outDv34o =D v ip −v in 12 v o= 1+replacing D 12 v ip −Dthe puts together, then 12 v ininput 1+ D 34 difference v gives: v do = A D F 12with v + F v − F v 12 dop R 2 don do R21 +ipR 2 R + F 21 v in ) ] v o= vinip − 2 v in v o =D 121 v ip −v v do = A D FR121 +vR v1dop + F 21 vR 2 −F 12R 1 don ip −F 21 v in ) ] v do = A D F 12 v don + F 21 v ip − F 12 v dop + F 21 v in ) ] v do = A D −FR v + F 21 v ip −v in v o = 122 dov ip −v in v do = A D F 12 v don −F R 112 v dop + F 21 v ip −F 21 v in ) ] v doR R 1 +moving R2 R 2 output Dividing by both 2 AD and −v v ov= = A+ F−F − v 12 v do =F 21 vvip in F 21 ipvresults A terms to RD1 +D R342 12 vRdo1+ side R in inin: do the Dleft-hand ip −v v o= 1+ D 12 v ip −D 121 v in v do1+ D 34 F =vRdo221=F vvip21−v +vF 12 v ipin−v in ip −v in F A D vvodoo==D 12 v ip −v in R12 1 v o= Instruments, the SSM2141 and SSM2143 from Analog Devices and the THAT1240 series from THAT Corporation. These all comprise an op amp and four laser-­ trimmed resistors, as shown for the THAT1240 series in Fig.19. The variants of these devices have different resistor values to obtain different gains; typically 0dB, ±3dB or ±6dB. The resistors on the ICs are not fully connected to form a difference amplifier, as in Fig.17, so that they can be wired externally to achieve different gains (eg, +3dB or -3dB). Fully differential amplifiers Referring to Fig.18, we have a fully differential amplifier which has a (very large) differential gain of AD, so vdo = (vdop – vdon) = AD(vdip – vdin). Here, vdip and vdin are the voltages directly at the fully differential op amp’s inputs, but we need to find the differential output in terms of the circuit input voltages, vip and vin. The op amp’s input voltages depend on the relevant output and circuit input voltages connected via the resistors. The two resistor pairs form potential dividers that act the opposite way round with respect to the circuit’s inputs and the op amp’s outputs. We can use superposition again to sum the two contributions at each op amp input. For vdin with respect to vdop, R1 and R2 form a potential divider in which R1 is the lower resistor, so the contribution of vdop to vdin is found by applying the potential divider formula to get (R1 ÷ (R1 + R2)) × vdop. We can define Fxy as the ‘potential divider fraction’ for resistors x and y, with x as the lower resistor, so that F12 = R1 ÷ (R1 + R2). This will help keep our equations tidy. R R 1 + Rand R 2 Using v o = this 2approach v ipsumming − 2 v in the R + R R R 1 = F12 × two contributions, we find vdin 1 2 1 vdop + F21 × vin and similarly, vdip = F34 × R2 vdon + F43 × vvoip=. Like difference am( vthe ip −v in ) R1 plifier, we use equal resistor ratios, so F12 = F43 and F21D=34 F34. That means vdip = F12 D 12 ) vnow ( 1+ can ip −Dsubstitute 12 v in × vdonv+o =F211+ ×D vip. We 34 these expressions for vdip and vdin in the =D ) equation for vvodo above to inget: 12 ( v ip −v ( )( ) ( ) ( ) ( ) v do = A D [ ( F 12 v don + F 21 v ip )−( F 12 v dop + F 21 v in ) ] v do = A D [ ( F 12 v don −F 12 v dop ) + ( F 21 v ip −F 21 v in ) ] Vcc 7 In- 2 v do = A D [−F 12 v do + F 21 ( v ip −v in ) ] 5 v do R1+ F v =F R(2v −v ) 12 do 21 ip in AD v do = In+ 3 R3 F 21 ( v −v ) F 12 ip in R4 R v do = 2 ( v ip −v in ) R1 4 6 1 Sense Vout Ref 8 G+1 Vee CMRR = NC R 4 T and pinout of Fig.19: the circuit structure the THAT1240 IC (from the data sheet). 40 FRis A+DF large (tens of 2 vvery 21 v doGiven = A D Fthat vvvdon − 12 D = 21 vvipipip−v −vFinin12 v dop + F 21 v in ) ] 34 do= v o = ordo thousands, much more) and vthe F12 FR1+ 12 v ip −D in 1 D 12 1+v D 34−F v + F v 12−F v do = A D is F 12 fraction typically tenths don 12 no dopmore21than ip 21 v in ) ] G+1 R = or hundredths, larger, we can vCMRR =and2R(often v+ip−v o =D 12 4 T in( v) ip −v in ) ] v do = A D [do −F v F R 1 do assume that the v12do ÷ A21 D term is much v do = A D [ (than v ip )G+1 −can + F 21 v in ) ] ( F 12 vbe dopignored. vFdo12 v don smaller F12+vFdo21 and + CMRR F 12 v do =F R = 21 ( v ip −v in ) 4+Tget: We divide by Fv12 to A v =then A (F −F Dv ) ( F v −F v ) do D [ 12 don 12 dop 21 ip 21 in ] F v do = A Dv[do−F = 1221v do( v+ipF−v 21 (inv)ip −v in ) ] F 12 v do If we divide opposite-direction + F two vR =F ( v −v ) A D v do12= do2 ( v ip21−v ipin ) in potential divider the resistor Rformulae, 1 F 21we are left with the sums cancel, and v do = −v ) ( v G+1 ratio of the two individual CMRR F 12R =ip in resistors, so: 4T R v do = 2 ( v ip −v in ) R1 Note the similarity with G+1 the standard CMRR = inverting amplifier,Rwhich 4 T has the same feedback-over-input resistor formula for its gain. For the THAT1646, R1 = 5kΩ and R2 = 10kΩ (see Fig.1), so R2 ÷ R1 = 2. Also, vin is grounded (equal to zero), so vdo = 2vip, that is, a gain of 2× (+6dB) with respect to the differential output, as seen in the simulations above. Common-mode rejection The common-mode rejection ratio (CMRR) is defined as the ratio of differential (AD) to common-mode gain (ACM), and is often expressed in decibels, calculated as 20log10(AD ÷ ACM). Ideally, differential amplifies have infinite CMRR. Unfortunately, both the difference amplifier and differential amplifier circuits have a CMRR that is highly dependent on the gain-setting resistors’ tolerance, even when using ideal op amps having infinite CMRR. Resistor tolerance (T) for a resistor of value R is defined as T = ΔR ÷ R, where ΔR is the largest deviation from R (positive or negative) for which the resistor is considered as being in specification. Usually, this is multiplied by 100 to give a percentage value when tolerances are stated, but analysis and resulting equations will normally use the absolute value of T. This may be stated without units, or with units of Ω/Ω. The worst-case actual or absolute value of an individual resistor (RA) is given by RA = RN(1 ± T), where RN is the nominal resistor value. When analysing the effect of component tolerance on circuit characteristics, we can use the worst-case combinations to find the maximum impact. For example, consider a basic inverting amplifier with gain -R2÷R1 using nominal values of 10kΩ and 1kΩ to give a gain of -10. The worst-case deviation in gain due to resistor tolerance would occur if the two resistors differed from nominal by the full tolerance in opposite directions. For example, for 1% resistors (T=0.01), we get -(10kΩ×1.01)÷(1kΩ×0.99) = -10.202 or -(10kΩ×0.99)÷(1kΩ×1.01) = 9.802. This is about a 2% error in both cases. Analysis of the effect of resistor tolerance on the CMRR of both difference and differential op amp amplifiers is more complex than for the gain of the amplifier we have just looked at. Although the final formula is straightforward, the analysis leads to some large equations, so we will not go through the details here. You can find the details of this, and related analyses, in two documents: Design Note 1023 from Linear Technology, now Analog Devices (www.analog.com/media/ en/reference-design-documentation/ design-notes/dn1023f.pdf) and Application Note SBOA582 from Texas Instruments (www.ti.com/lit/SBOA582). For difference and differential amplifiers with a circuit gain of G built using four independent resistors of tolerance T, the worst-case CMRR due to the resistors (CMRRR) is (G + 1) ÷ 4T. Some example CMRR values for various amplifier gains and resistor tolerances are shown in Table.1. General-purpose op amps typically have CMRR values in the range of 70-100dB but higher-precision devices may range up to around 130dB. Given that CMRR is important for balanced line receivers, we would not want to undermine it through poor resistor choices. Table.1 implies that we would need resistors with tolerances of ±0.01% or better to prevent the resistor-based CMRR from dominating the overall CMRR. Resistors with ±0.01% and ±0.001% tolerance are available, but they cost significantly more than standard resistors. Even if cost is not a concern, using individual discrete resistors is not the best option. Table 1: differential amplifier CMRR due to resistor tolerance for various gains. Resistor tolerance Gain 1× 10× 20× 5% 20dB 35dB 40dB 1% 34dB 49dB 54dB 0.1% 54dB 69dB 74dB 0.01% 74dB 89dB 94dB 0.001% 94dB 109dB 114dB Practical Electronics | July | 2026 adjusted by burning away some of the material using a laser. This increases the resistance. LT5400-4 R1 1 8 The process can be per– R2 formed while the device 7 – 2 is being tested on the LT1468 INPUTS R3 6 + 3 wafer before the individ+ R4 ual chips are cut from it. 4 5 REF The THAT1606 and THAT1646 line drivers 4.7pF and the various balanced 5400 TA01a line receiver ICs mentioned above all use Fig.20: a difference amplifier using an LT5400 resistor laser-trimmed thin-film network (from the data sheet). resistors to help ensure good performance. Of course, if the resistors are well One disadvantage of on-chip resismatched, their ratios will be well tors is that a limited number of gain matched too, and we will have accurate values and circuit configurations are gain and good CMRR. However, even if available. Using op amps with discrete the resistors are perfectly matched at a resistors has more flexibility, but as given time, they may not stay that way. just discussed, will limit performance. If they are subject to different temperaAn alternative is to use a precisiontures, their values will shift differently. matched resistor network – integrated Also, they may age differently. devices that contain a number of resistors Effects such as this can degrade the with accurate ratios. Like high-precision CMRR over time or in changing enviindividual resistors, these devices are ronmental conditions. relatively expensive. An example is the LT5400 quad Ratio matching matched resistor network from Analog As discussed above, it is the resistor Devices, which is available in eight variratios that really matter, not the absoants with different resistor values and lute values. Fortunately, it is possible to five ratio options. An example differmaintain a resistor ratio even if absolute ence amplifier circuit using the LT5400 values change (eg, with temperature). is shown in Fig.20. This can be done to some extent with The A-grade version of the LT5400 discrete resistors on a PCB by mounthas ±0.01% matching of resistors with ing them close together and avoiding a resistor matching ratio temperature temperature gradients. However, close drift of 0.2 parts per million per degree placement is more effective for inteCelsius (0.2ppm/°C). The absolute value grated devices, which also tend to have tolerance is only ±7.5%, but as the closer matching of temperature coeffiprevious discussion has indicated, it cients. IC designers also have access is the ratio that matters in differential to layout techniques that help provide amplifiers. very good matching and ratio stability. Models of the LT5400 are available Another advantage of integrating the in the Misc section of the LTspice comresistors in a differential amplifier is ponent library. that on-chip resistors can be adjusted during manufacture to obtain very precise ratios. This approach uses thin-film A better THAT1646 circuit resistors formed from material deposThe circuit in Fig.2 is a basic version ited on the chip. The resistances can be of the THAT1646 line driver circuit. 4.7pF Fig.21: a THAT1646 based circuit with output and RFI protection. Practical Electronics | July | 2026 Fig.21 has some additional components to provide output and radio frequency interference (RFI) protection. The additions are recommended in the datasheet. The circuit in Fig.21 can be simulated with the addition of the supplies, sources and buffer from Fig.2. Decoupling capacitors C3 and C4 are required in a real circuit, but will have little effect in the simulation, due to the ideal voltage sources supplying the circuit. Inductors L1 & L2 and capacitors C5 & C6 form two filters to prevent any RFI picked up by a cable on the output from getting into the circuit. The 782763501 is an SMD (M3216/1206) ferrite bead from Würth Elektronik, which is available from the “Select Ferrite Bead” menu via rightclicking the schematic symbol. It has a 500Ω impedance at 100MHz. This specific choice is not critical; other ferrite beads would also be suitable. Diodes D1 to D4 provide protection against the possibility that the circuit could be connected to a balanced input providing 48V phantom power. The datasheet circuit uses 1N4004 diodes, but LTspice only has the similar (higher voltage rating) 1N4007 devices in the library. The schematic is labelled using 1N4004 but references the 1N4007 model via the ako: (a kind of) model construct. Phantom power circuits are used with condenser microphones that have built-in preamps. The 48V power is connected to both signal wires via a couple of resistors – thus appearing as a common-mode signal on the balanced line, and can be obtained from a centre-tapped secondary of the transformer in the microphone. With 48V active, the line receiver input capacitors can discharge via the THAT1646 and may cause damage. As 48V is greater than the supply voltage, the diodes will conduct and absorb the energy instead. Conclusion By combining a balanced line driver like the THAT1646with a difference amplifier like that shown in Fig.21, we obtain a low-cost, robust system capable of sending audio over long cables with little degradation or EMI/noise pickup. We do have to be careful with the selection of resistors in our difference amplifier in the receiver to keep the CMRR high. Otherwise, the ability of the system to reject noise pickup will be degraded. Luckily, numerous monolithic ICs and resistor networks are available to allow us to do this, as using individual resistors for this job PE is far from ideal. 41