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Teach-In 2026 by Mike Tooley World of Wireless – An Introduction to Radio and Wireless Technology Series 12, part 4: software-defined radio I n the last instalment of this series, we introduced the fundamentals of radio communication systems, provided an overview of Morse code and CW (continuous wave) as a simple method of communication, and discussed the importance of modulation and demodulation. This month, our focus shifts to software-defined radio (SDR), an innovative technology that enables radio signal processing tasks traditionally handled by hardware to be managed via software. We examine different SDR solutions and show how a costeffective SDR paired with powerful software can allow you to receive a wide range of radio signals at frequencies extending from HF to UHF. This month’s Hands-On project uses the VFO (variable-frequency oscillator) and 10MHz crystal-­ controlled reference oscillator modules from last month as the foundation for an amplitude-modulated RF (radio-frequency) signal source. Phase-locked loop techniques did not arrive in mass-produced equipment until the early 1970s. Compared with today’s equipment, such arrangements were crude, employing as many as nine or ten ICs. Complex as they were, those PLL circuits were more cost-effective than their comparable multi-crystal mixing synthesiser counterparts. With the advent of large-scale integration (LSI) in the late 1970s, the frequency-generating unit in most radio equipment could be reduced to one, or perhaps two, LSI devices together with a handful of additional discrete components. The cost-effectiveness of this approach is now beyond question, and it is unlikely that, at least in the most basic equipment, much further refinement will be made. In the area of more complex receivers and transceivers, we are now witnessing a further revolution in the design of synthesised radio Digital frequency synthesis Before introducing our main topic, it’s important to outline how digital systems can be used to control analog oscillators, with particular emphasis on the application of phase-locked loops (PLL). PLL technology was first incorporated into military communications equipment during the mid-1960s, addressing the need to generate a wide range of accurate and stable frequencies within multi-channel frequency synthesisers. In those early applications, cost considerations were secondary, permitting the use of advanced circuit designs that utilised large numbers of discrete components and integrated circuits (ICs). 22 Voltage controlled oscillator equipment, with the introduction of dedicated processors that permit keypad-programmed channel selection and scanning with pause, search, and lock-out facilities. The most basic form of PLL consists of a phase detector, filter, DC amplifier and voltage-controlled oscillator (VCO), as shown in Fig.4.1. The VCO is designed so that its free-running frequency is at or near the reference frequency. The phase detector senses any error between the VCO and reference frequencies. The output of the phase detector is fed, via a suitable filter and amplifier, to the DC control voltage input of the VCO. If there is any discrepancy between the VCO output and the reference frequency, an error voltage is produced, which is used to correct the VCO frequency. The VCO thus remains locked to the reference frequency. If the reference frequency changes, so does the VCO’s. fo = fref fo Output Buffer/amplifier d.c. Low-pass filter Phase detector Fig.4.1: a simple phase-locked loop signal source. Reference oscillator fref fref Buffer/amplifier Practical Electronics | February | 2026 Voltage controlled oscillator fo fo = n fref Output Buffer/amplifier Variable divider (divide-by-n) d.c. fo/n Low-pass filter Phase detector Reference oscillator fref fref Buffer/amplifier The bandwidth of the system is determined by the time constants of the loop filter. In practice, if the VCO and reference frequencies are very far apart, the PLL may be unable to lock. The frequency range over which the circuit can achieve lock is known as the capture range. A PLL takes a finite time to achieve a locked condition, so Fig.4.2: a phaselocked loop employing a frequency divider. that the VCO locks to the mean value of the reference frequency. The basic form of PLL, shown in Fig.4.1, is limited in that the reference frequency is the same as that of the VCO and no provision is incorporated for changing it, other than by varying the frequency of the reference oscillator itself. fo Voltage controlled oscillator In practice, it is normal for the phase detector to operate at a much lower frequency than that of the VCO output; hence, a frequency divider is incorporated in the VCO feedback path, as shown in Fig.4.2. The frequency presented to the phase detector will thus be fo ÷ n, where n is the divisor. When the loop is locked (ie, no phase error exists), we can infer that fref = fo ÷ n or fo = n·fref. A similar divider arrangement can also be used at the reference input to the phase detector, as shown in Fig.4.3. The frequency appearing at the reference input to the phase detector will be fref ÷ m and the loop will be locked when fref ÷ m = fo ÷ n or fo = (n ÷ m)fref. Thus, if fref were 100kHz, n were 2000 and m were 10, the output frequency, fo, would be (2000 ÷ 10) × 100kHz = 20MHz If the value of n is made variable by replacing the fixed divider with a programmable divider, different output frequencies can be generated. If, for example, n were variable from 2000 to 2100 in steps of one, fo would range from 20MHz to 21MHz in 10kHz steps. Fig.4.3 shows the basic arrangement of a PLL incorporating a programmable divider driven from the equipment’s digital frequency controller. fo = (n/m)fref Output Buffer/amplifier Variable divider (divide-by-n) d.c. fo/n Low-pass filter Phase detector Reference divider (divide-by-m) Reference oscillator fref fref/m fref/m Frequency control Practical Electronics | February | 2026 Frequency control Buffer/amplifier Fig.4.3: a complete digital frequency synthesiser. 23 Mixer I Low-pass filter DDC ADC Antenna RF sub-system PLL VCO Digital signal processing Splitter +90° Band-pass filter Phase shifter Q ADC Fig.4.4: the simplified architecture of a receiver using SDR technology. Problems can sometimes arise in high frequency synthesisers where the programmable frequency divider, or divide-by-n counter, has a restricted upper frequency limit. In such cases, it is necessary to mix the high-frequency VCO output with a stable locally generated signal derived from a crystal oscillator. The mixer output (a relatively low difference frequency) will then be within the range of the programmable divider. Software-defined radio In the radio architecture that we met last month, the signal paths were implemented using a traditional approach based on application-specific hardware components such as resistors, capacitors, inductors and semiconductor devices. In modern radio equipment, there is an increasing use of software both for controlling the hardware and for signal processing. This has led to the advent of two important technoloI DUC Mixer Low-pass filter gies: software-controlled radio (SCR) and software-defined radio (SDR). SCRs are now extensively used in current equipment, enabling the operating parameters of large and medium-scale ICs to be configured using digital techniques based on microprocessors, where software and data are stored in solid-state memory devices, such as flash memory. In software-controlled radio, the signal path is implemented using hardware, with some functionality controlled by software. Parameters usually controlled by software include frequency selection, tuning, mode selection, gain control and transmission power. Software-defined radio (SDR) takes this one step further, with most of the signal processing (including filtering, modulation/demodulation and encoding/decoding) being performed by software (ie, instruction code running on a general-purpose processor or digital signal processor [DSP]) rather than hardware. Low-pass filter Mixer DAC Digital signal processing Antenna RF sub-system Combiner Phase shifter Q DUC +90° Band-pass filter DAC Low-pass filter 24 DDC SDR is a rapidly emerging technology, showing considerable promise with state-of-the art implementation in commercial and military radio equipment. An SDR may still use conventional radio architecture in the front-end RF and mixer stages. With SDR technology, the signal path can be easily reconfigured without the need for costly changes to hardware. Most of the digital signal processing within an SDR is conventionally implemented using one or more field-programmable gate arrays (FPGA), DSPs or an equivalent embedded processing device. The signal path in SDR equipment can be quickly and easily reconfigured by making changes to the software. This allows modification and upgrading without the need to change any hardware. It also permits the rapid cloning of operational parameters such as frequency, channel spacing and selectivity. Figs.4.4 & 4.5 show the simplified arrangements of receivers and trans- PLL VCO Data Data Mixer Fig.4.5: the simplified architecture of a transmitter using SDR technology. Practical Electronics | February | 2026 mitters based on SDR technology, respectively. Note how analog-todigital conversion (ADC) is used in the receiver, while digital-to-analog conversion (DAC) is employed in the transmitter. Analog circuitry is still present in both the receiver and transmitter, the former having it in the low-level RF amplifier and mixer stages, while the latter uses conventional analog circuitry in its high-level driver and RF power amplifier stages. In the SDR receiver arrangement shown in Fig.4.4, the RF subsystem (typically comprising band-pass filters and RF amplifiers) supplies an analog signal to the splitter with identical in-phase signals applied to the two mixer stages. The local oscillator input to the two mixers is derived from a PLL VCO arrangement. The local oscillator input to one of the mixers is phase shifted by 90° so that the two local oscillator signals are in phase quadrature (two signals with a 90° phase shift between them). The two mixer outputs go through low-pass filters before being applied to two ADCs, the outputs of which constitute in-phase (I) and quadrature (Q) components. The I and Q signals then pass into a digital down converter (DDC) to reduce the sampling rate of the signal before being passed to the digital signal processor (DSP) where the modulation (AM, FM or PSK data) is recovered from corresponding pairs of down-sampled quadrature data. The digital back-end of an SDR usually comprises an FPGA or embedded processor with onboard DSP functionality for modulation, demodulation, up-converting, down-converting, coding, decoding and protocol handling. This can also be implemented using a powerful enough general-purpose computer CPU. All this complex processing is achieved using easily reconfigurable software, rather than extensive hardware that uses conventional components and circuitry. In the corresponding SDR transmitter arrangement shown in Fig.4.5, the digital data is processed before being applied to digital up-­ converters (DUC), from which the I and Q signals are derived. These are then fed to two DACs, each followed by low-pass filters. The mixing process (like that used in the SDR receiver shown in Fig.4.4) produces two quadrature signals that are combined before application to the RF subsystem, which typically comprises a pre-driver, driver and Practical Electronics | February | 2026 Fig.4.6: inexpensive USB dongles are a great way to start experimenting with software-defined radio. power amplifier. After bandpass filtering, the final output is applied to the antenna. Getting started with SDR There are several ways to get started with SDR. Fully integrated SDR receivers have hardware, software and displays integrated in the same package. They offer exceptional performance but can be expensive. PC-based SDR adaptors are also available from several suppliers including Airspy, HackRF, and RSPlay. This alternative can be great if you know that you will be using SDR regularly for listening and experimentation. These mid-range SDR receivers require a PC or laptop and appropriate software. Inexpensive DVB-T (digital TV) receiver dongles can also be used. This low-cost option will get you started with SDR, but will still allow you to experiment with a wide variety of fully featured software such as SDR#, HDSDR, and SDR Console. As it requires minimal outlay, this is the approach that we’ve adopted for this Teach-In series. Fig.4.6 shows just a small selection of low-cost SDR receivers currently available. Based on lowcost chips originally designed for use in DVB-T set-top boxes, the receivers shown in Fig.4.6 are widely available from online sellers in versions that support reception over the entire VHF and UHF range. In recent years, several manufacturers have added features that not only improve performance but also extend coverage to MF and HF. Companion software can be freely downloaded from the web for running under most popular operating systems, including Windows, Linux and macOS. This means you can leverage this technology as an effective means of studying RF principles and exploring the electromagnetic spectrum. The internal arrangement of a basic RTL-SDR is shown in Fig.4.7. RF input is via an MCX coaxial connector, and initial analog signal processing is handled by an R820T from Rafael Micro. Designed to function as a low-power digital TV tuner, this device comprises a low-noise amplifier (LNA), mixer, PLL, VCO, crystal-controlled reference oscillator and intermediate frequency (IF) filter. RTL2832U SDR/DSP R828D tuner 28.8MHz crystal USB male connector Infrared interface Fig.4.7: the layout of a basic MCX input DVB-T (50Ω) dongle. Electrically erasable memory (EEPROM) 3.3V voltage regulator 25 RF front end R828D tuner RTL2832U SDR/DSP Temperature compensated crystal oscillator (TCXO) USB RF filter USB male connector Bias tee LED SMA input (50Ω) GPIO expansion ports Notch filters HF up-converter Expansion ports (I2C, clock, power) The chip operates from a 3.3V supply, has a quoted frequency range of 42-1002MHz and a noise figure of 3.5dB. The R820T comes in a 24-pin QFN (quad flatpack, no leads) package. Following IF conversion, the next stage is an RTL2832U IC that provides full SDR functionality with a USB interface. The chip incorporates a sampling clock, IF to baseband conversion and low-pass filters in the I and Q signal paths. Multiple IF input frequencies are supported, as well as a zero-IF input. The chip is supplied in a 48-pin QFN package. An improved RTL-SDR is shown in Fig.4.8. This upgraded device is fitted with a more robust SMA input connector as well as an improved RF front end. The tuner chip has been replaced by an R828D and a temperature-controlled crystal Fig.4.8: the layout of an improved RTL-SDR dongle. oscillator (TCXO) fitted to provide a frequency accuracy of typically better than ±1ppm. Additional filtering is applied to reduce noise from the USB interface. An HF converter has been added to extend frequency coverage to the spectrum below 30MHz. Improving RTL-SDR performance RTL-SDR performance can be improved in several ways. Some manufacturers have added extra RF filtering (see Fig.4.9), while others have focused on noise reduction and RF input protection. Yet others have incorporated improved heat dissipation for the tuner and SDR chips, which both tend to run hot when mounted in small plastic enclosures. Even the performance of the most inexpensive dongles can be improved by mounting them in a small diecast enclosure and fitting external SMA or BNC adaptors, as shown in Fig.4.10. It’s also possible to connect an HF input directly to the RTL­2823U chip via a suitable RF filter (Fig.4.10), allowing direct sampling that bypasses the tuner stage completely. Details of these and various other useful modifications can be found on the web (or see the article starting on page 32 of our November 2018 issue). Up-converters An alternative approach to extending the coverage of a basic RTL-SDR dongle is using mixing techniques to convert the desired frequency range into a range that lies within that covered by the RTL-SDR device. A typical device such as the popular Ham-it-Up HF Upconverter uses a 125MHz local oscillator (LO) to mix an RF input between 100kHz and 50MHz, and produce intermediate frequency (IF) signals between 125.1MHz and 175MHz, thus adding effective MF and HF coverage. Our SiDRADIO project, published in four parts starting with the October 2014 issue, used a similar approach. It combined a DVB-T dongle with a tuned front-end, RF amplifier and up-converter incorporating a 125MHz TCXO. For example, if a signal is to be received on 1.6MHz, the SDR software will be tuned to 125MHz + 1.6MHz = 126.6MHz. The software can add a preset offset to the display frequency, so that although it is Fig.4.9: added filters on a dongle for wider frequency coverage. 26 Practical Electronics | February | 2026 receiving the signal at 126.6MHz, the display will read 1.6MHz. SDR software An extensive selection of SDR software is available. Depending on your operating system, you could consider several popular SDR software packages including SDR Console, SDR#, SDR++, HDSDR, Cubic SDR and GQRX. Here’s a summary of their main features. SDR Console is a comprehensive and feature-rich SDR program for Windows. SDR Console supports a wide range of SDR hardware. It offers advanced features such as multi-receiver support, recording and playback, remote operation, and a highly customisable user interface. SDR Console is well-suited for beginners as well as more advanced users requiring powerful signal analysis and management tools. SDR Console has an attractive and reasonably intuitive interface, and is the package that we’ve used extensively to produce this article. SDR# (also called SDRSharp) is an extremely popular SDR application that offers a user-friendly interface as well as extensive support for optional plugins. SDR# supports a wide range of SDR devices and works well when paired with a basic RTL-SDR dongle. Its functionality can be easily extended with the currently available library of plugins. SDR++ is a cross-platform opensource SDR that aims to be “bloat free and simple to use”. The package offers wide hardware support and has a straightforward user interface. It’s available for Windows, Linux, macOS and BSD. HDSDR: this excellent Windowsbased SDR supports a wide variety of SDR hardware. It features a clean and attractive interface, powerful signal processing capabilities and multiple demodulation modes. The package provides excellent tuning control and incorporates a useful recording capability. CubicSDR is an open-source, cross-platform SDR program available on Windows, macOS and Linux. CubicSDR supports a wide range of SDR devices and provides intuitive spectrum and waterfall displays. GQRX is popular with Linux and macOS users (a Windows version is also available). Built on the GNU Radio framework, GQRX offers a lightweight and easy-to-use interface with frequency scanning and a range of audio output options. Setting SDR Console Setting up an SDR receiver requires several stages and can sometimes be confusing, so we’ve provided a few notes to help you with this task. Based on SDR Console and our recommended device, the popular and well-supported RTL-SDR V4, here’s a five-step overview of the process (useful guides and walkthroughs are available at www.sdr-radio.com). 1. Connect the SDR dongle and install the drivers Insert your RTL-SDR into an available USB port. Since it’s unlikely that you will already have the required driver installed, your next task will be to install the correct driver for the SDR. We recommend using the Zadig utility on Windows systems, which can be obtained from https://zadig.akeo.ie/. Simply download it, open the file and then click on “Yes” to install it. To replace the default driver, go to the “Options” menu in Zadig and select “List All Devices”. This will show all USB devices connected to your computer, including your SDR dongle. In the dropdown list, look for “Bulk-In, Interface (Interface 0)” (sometimes it may appear as “RTL2832U” or “RTL2832UHIDIR”). Installing the driver to the wrong device may cause problems, so ensure that you select “Interface 0” (not “Interface 1” or any other device). With the correct device selected, ensure that “WinUSB” is chosen as the target driver in the box next to the arrow. Click “Replace Driver” so that Zadig uninstalls the default driver and replaces it with WinUSB for your newly added device. This process may take a little time. If Zadig doesn’t manage to find your device, unplug and then reinsert it. Alternatively, simply restart your computer and run Zadig again. 2. Download, install and launch SDR Console Having successfully installed the replacement driver, visit the SDR Fig.4.10: improvements made to a low-cost dongle: a screened enclosure, RF connectors, low-pass filter and direct sampling mod. Practical Electronics | February | 2026 27 Fig.4.12: selecting modes of reception in SDR Console. These are added to the radio Definition and thereafter can be selected from the Mode dropdown menu. allow you to verify the setup. Note that for optimum reception, you will need to move the antenna well away from any nearby sources of interference. You are now ready to enjoy your new SDR radio! Fig.4.11: setting the bandwidth before starting the RTL-SDR in SDR Console. Console website at www.sdr-radio. com/download and download the latest version of the SDR-Radio software (we chose “Beta 3.4 Build 3818”). Warning: there are many scam download ads on this site, so make sure you don’t click on any of them. There are currently two options to access the installation package, either “Microsoft” or the “OneDrive” hosting service. We chose the former. Download the SDR-Radio package, open the downloaded file and run the installer. Several additional C++ files may be required during the installation process. Follow the prompts to complete the installation and then open SDR Console from your Start menu or desktop shortcut. 3. Add your RTL-SDR device for use with SDR Console On first running SDR Console, you will be prompted to add a radio. Click “Definitions” and then “Search”. SDR Console will then scan for any connected SDR hardware. Select the RTL-SDR from the search list and click “Save”. If an RTL-SDR dongle can’t be found, ensure the drivers have been installed correctly (repeat Step 1). 4. Configure basic settings and connect the antenna Click on “Select Radio” and highlight the saved definition for your SDR dongle. This will usually appear as “RTL-SDR Blog V4”, or something similar. Next, select a bandwidth for your device (see Fig.4.11) and then click “Start” to 28 activate the radio and return to the main window and start the SDR receiver. Next, attach a suitable antenna. We don’t recommend connecting the antenna that’s usually supplied with the low-cost SDR dongles. Instead, some initial testing can be carried out using a small dipole antenna (more on this next month) or just a 1.5m length of insulated wire connected to the centre contact of the dongle’s SMA connector. If you wish to add reception modes other than those that are selected by default, these can be easily added by making appropriate changes to the radio’s “Definition” settings (see Fig.4.12). 5. Check the SDR with broadcast FM radio signals Set the receive mode to broadcast FM (“BC FM”), adjust the RF gain to around 30dB and search for local signals at 88-108MHz. This will R1 15kΩ C1 10nF Hands-On: An AM signal source This month’s Hands-On project is an AM signal source that extends the functionality of the two modules described last month. The AM signal source comprises three modules: 1. The VFO (or the 10MHz crystalcontrolled reference oscillator) described last month. This module generates the RF carrier as an input to the modulator module. 2. An AF oscillator that generates a constant 900Hz audio tone for the modulating signal. 3. An AM modulator that produces an amplitude-modulated (AM) output using the inputs from the other two modules. We will now describe the construction of the two new modules before bringing them together in the complete AM signal source. AF oscillator module The circuit of the AF oscillator module is shown in Fig.4.18. The +12V R2 15kΩ C2 10nF TR1 2N7000 R5 4.7kΩ + TR2 BC548 c b P1-3 C6 47µF d e g s C4 + 10µF R3 3.9kΩ C3 100nF R4 3.3kΩ RV1 500Ω C5 10µF RV2 500Ω + Output P1-1 Com. P1-2 Fig.4.18: the circuit of the AF oscillator module. Practical Electronics | February | 2026 Fig.4.13: using SDR Console to receive a local FM broadcast station on 104.8MHz. Fig.4.14: using SDR Console to receive Air Traffic Control (AM) on 133.175MHz. Fig.4.16: using SDR++ to receive the same local FM broadcast station as in Fig.4.13. Fig.4.15: SDR Console receiving amateur radio CW (Morse) transmissions on the 20m amateur band. Fig.4.17: using GQRX to receive the same local FM broadcast station as in Fig.4.13. Practical Electronics | February | 2026 oscillator is based on a simple twinT arrangement with TR1 operating in common-source mode. A second emitter-follower stage, TR2, minimises the effects of loading on the oscillator circuit. DC feedback from the emitter of TR2 to the gate of TR1 stabilises the operating conditions, while presets RV1 and RV2 provide gain adjustment and output level control, respectively. To ensure the purity of the output signal, RV1 is adjusted for the minimum gain needed for reliable oscillation, while RV2 is adjusted for the required output amplitude. If TR1’s swing is too large, it could generate undesirable harmonics. 29 Fig.4.19: the AF oscillator module’s component layout. Fig.4.20: the track layout for the AF oscillator module. R5 560Ω Fig.4.21: the circuit of the amplitude modulator module. SK1 RF input TR2 2N2222 c b R2 100kΩ SK2 Mod. RF output C4 1nF R4 680Ω e c b AF input C6 100nF C5 47µF L1 100µH C2 10nF C1 10µF P1-1 P2-3 + R3 100kΩ +12V e R1 100kΩ RV1 500Ω + C3 10µF Com. P2-2 Com. P1-2 P2-1 The component layout for the AF oscillator module (viewed from the top) is shown in Fig.4.19, while the corresponding track layout (viewed from below) is in Fig.4.20. The required track breaks can be made using a spot face cutter or small drill bit, and the links on the upper side of the boards are made using short lengths of tinned copper wire. Amplitude Modulator The circuit of the amplitude modulator is shown in Fig.4.21. The module uses a direct-coupled cascode arrangement where the AF modulating and RF carrier signals are applied respectively to the bases of TR1 and TR2. The amplitudemodulated output is then extracted from the collector of TR2. An output of approximately 1.5V RMS is developed across the load resistor, R4. The component layout for the Semiconductors 1 2N7000 enhancement-mode N-channel Mosfet (TR1) 1 BC548 NPN transistor (TR2) Resistors (all ¼W axial, ±5% or better) 2 15kΩ (R1, R2) 1 4.7kΩ (R5) 1 3.9kΩ (R3) 1 3.3kΩ (R4) 2 500Ω miniature preset potentiometers/ trimpots (RV1, RV2) Parts List – Amplitude modulator module 1 25 × 64mm piece of stripboard (9 × 24 holes) 1 2-pin male 0.1in/2.54mm header (P1) 1 3-pin male 0.1in/2.54mm header (P2) 2 PCB-mounting female SMA connectors (SK1, SK2) 1 100μH axial RF inductor (L1) Semiconductors 2 2N2222 NPN bipolar junction transistors (TR1, TR2) Capacitors 1 47µF 16V radial electrolytic (C5) 2 10µF 16V radial electrolytic (C1, C3) 1 100nF 50V ceramic (C6) 1 10nF 50V ceramic (C2) 1 1nF 50V ceramic (C4) Resistors (all ¼W axial, ±5% or better) 3 100kΩ (R1, R2, R3) 1 680Ω (R4) 1 560Ω (R5) 1 500Ω miniature preset potentiometer/trimpot (RV1) AM module (viewed from the top) is shown in Fig.4.22, while the corresponding track layout (viewed Fig.4.22: the amplitude modulator module’s component layout. 30 1 25 × 64mm piece of stripboard (9 × 24 holes) 1 3-pin male 0.1in/2.54mm header (P1) Capacitors 1 47µF 16V radial electrolytic (C6) 2 10µF 16V radial electrolytic (C4, C5) 1 100nF 50V ceramic (C3) 2 10nF 50V ceramic (C1, C2) TR1 2N2222 + Parts List – AF osc. from below) is given in Fig.4.23. As before, the required track breaks can be made using a spot face cutter Fig.4.23: the track layout for the amplitude modulator module. Practical Electronics | February | 2026 VC1 270pF Coaxial cable with 2 x SMA male connectors VC1 270pF AF source AF source VR1 10kΩ P1-1 P1-2 P1-3 SK2 VR1 10kΩ SK1 S1 On/off Mod. adj. Mod. adj. SK2 Mod. input Assembling the AM signal source When the three modules are complete, they should be mounted in a suitable ABS enclosure and interconnected as shown in Fig.4.24. Refer to the parts list on page 32. This diagram shows our VFO module from last month being used as the RF source, but if you prefer to use the 10MHz frequency standard (also described last month), the wiring from P1 to VC1 can be ignored. To avoid the somewhat tedious task of manually fitting the SMA and BNC connectors, we recommend the use of ready-made coaxial cables to link the VFO to the modulator RF input and to link the modulated RF output to the panel-mounted BNC output connector. Both cable assemblies are available at a reasonable cost from online suppliers. Our prototype wiring is shown in Fig.4.25. SK1 P1-1 P1-2 P1-3 P2-1 P2-2 P2-3 SK2 or small drill bit, and the links on the upper side of the boards made using short lengths of tinned copper wire. VFO (or 10MHz crystal oscillator-see text)VFO (or 10MHz crystal oscillator-see text) P2-1 P2-2 P2-3 SK1 Modulator P2-1 P2-2 P2-3 SK3 Mod. RF out P1-1 P1-2 P1-1 P1-2 P1-1 P1-2 Coaxial cable with SMA SK1 SK3 male to BNC female Mod. RF out Modulator Fig.4.24: interconnecting the three modules. P2-1 P2-2 P2-3 Coaxial cable with SMA male to BNC female P1-1 P1-2 Coaxial cable with 2 x SMA male connectors SK1 12V DC +S1 On/off - nel between 750kHz and 900kHz (ie, one without a broadcast AM station near it), then tune VC1 until a strong modulated signal is heard. At this point, it’s worth experimenting with the setting of the modulation depth control, RV1. If you increase the modulation depth slowly, you will notice that the amplitude of the received audio increases. As the modulation depth reaches and then exceeds 100%, the signal will start to spread over a wider range of frequencies and begin to sound Testing As always, it’s important to check the stripboard and internal wiring before applying power. When these checks are complete, apply power to the module, adjust all presets as well as the modulation control and VC1 to mid-position and then switch it on. If you have an oscilloscope, it can be connected to the BNC connector so that you can observe the Fig.4.25: the modulated RF internal wiring of our waveform. prototype AM signal The modusource. lation control can then be adjusted for the correct modulation Practical Electronics | February | 2026 + - SK2 Mod. input depth (usually 30-50%). If the output appears unmodulated at all settings of VR1, check the AF oscillator and, if necessary, adjust RV1 just beyond the point at which oscillation starts. RV2 can then be adjusted to set the modulation depth in conjunction with the front-panel control, VR1. For testing the VFO-driven modulator, you will require the services of an AM receiver covering the medium-wave band. This can be virtually any domestic portable receiver or either of the two simple receivers described previously in this series. Connect a short length of hookup wire to the centre of the BNC connector and position the receiver about 1m away from the modulator. Tune the receiver to a vacant chan- SK1 12V DC 31 (a) (a) 30% 30% amplitude amplitude modulation modulation (b) (b) 50% 50% amplitude amplitude modulation modulation (d) (c) (d) >100% >100% amplitude amplitude modulation modulation (c) 85% 85% amplitude amplitude modulation modulation Fig.4.26: these examples shows the effect of increasing the modulation depth on the RF output from the amplitude modulator. noticeably distorted (see Fig.4.26). With the modulator working, the next step is to check its output over the full range of adjustment of VC1, tuning the radio at each stage to locate the signal and again noting the effect of varying VR1. If you have been using the 10MHz crystal-controlled frequency standard instead of the VFO, you will require the services of a short-wave receiver, or you can use an SDR receiver like those described earlier. If no output is detected from the modulator, disconnect the power and recheck the two new modules and off-board wiring. Tables 4.1 and 4.2 show the test voltages obtained from our AF oscillator and AM modulator modules, respectively. Side frequencies and sidebands If you have the RTL-SDR and companion software described earlier, it can be very instructive to examine the modulated signal in detail and see what happens to the AM waveform when the carrier is being modulated. Tune VC1 to obtain an output as near to 900kHz as possible and set the SDR ‘close-in’ to display the spectrum on either side of the carrier frequency. Increase the modulation depth slowly and observe the display (see Fig.4.27). Fig.4.27(a) shows the carrier in its unmodulated state. Note how this appears as a single frequency (vertical line) at 900kHz. Fig.4.27(b) shows the effect of increasing the modulation depth to around 30%. The 900kHz carrier is still present, but two new ‘side frequency’ components have appeared with amplitudes below that of the carrier. Parts List – off-board components 1 ABS enclosure 1 15cm bulkhead panel-mount BNC female to SMA male coaxial cable adaptor 1 15cm male-to-male SMA coaxial pigtail cable 1 panel-mount 5.5mm DC jack connector (SK1) 1 SPST miniature toggle switch (S1) 1 3.5mm miniature jack connector with switch contacts (SK2) 1 10kΩ linear variable potentiometer (VR1) 12 brass or nylon M3 × 10mm hex spacers/standoffs 24 M3 panhead machine screws 32 The lower side frequency (LSF) appears at 899.1kHz, 900Hz below the carrier. The upper side frequency (USF) is evident at 900.9kHz, 900Hz above the carrier. This should make sense when you realise that the frequency from our AF source is 900Hz. The important outcome from this is that our amplitude modulated signal now occupies a range of RF frequencies extending from 899.1kHz to 900.9kHz (900kHz ±900Hz). If you increase the modulation depth so it approaches and then exceeds 100%, you will have a spectrum that looks like Fig.4.27(c). Here, several more side frequencies have appeared on either side of the carrier. These correspond to the second, third, fourth and fifth harmonics of the modulating signal, and the total bandwidth has extended to around 9kHz (900kHz ±4.5kHz). Table 4.1 – AF osc. Table 4.2 – modulator Dev. TR1 TR2 Pin Voltage D 6.5V G 5.8V S Dev. Pin Voltage C 4.0V B 0.8V 3.8V E 0.1V C 12.0V C 10.5V B 6.5V B 4.7V E 5.9V E 4.0V TR1 TR2 Practical Electronics | February | 2026 (a) Unmodulated carrier (a) Unmodulated carrier (b) 30% amplitude modulation (b) 30% amplitude modulation (a) (a) Unmodulated Unmodulated carrier carrier (b) (b) 30% 30% amplitude amplitude modulation modulation (c) Modulation exceeds 100% (c) Modulation exceeds 100% (d) Gross overmodulation (d) Gross overmodulation Fig.4.27: this shows effect of increasing the modulation depth on the output frequency spectrum of the amplitude modulator. (d) Gross overmodulation (c) (c) Modulation Modulation exceeds exceeds 100% 100% Increasing the modulation depth further causes the signal to spread even more, as in Fig.4.27(d). This grossly over-modulated signal occupies a bandwidth of around 12.5kHz, with up to the 7th harmonic appearing in the side frequencies. Measuring modulation depth (d) Gross overmodulation microphone. A signal of around popular types are built, how they 100mV will produce 100% modula- work and how well they perform. tion with the “Mod. Adj.” control, We’ll demonstrate easy ways to conVR1, rotated to its fully clockwise struct several basic antennas and position. Have fun with your AM discuss why matching them propmodulator, but ensure that the sig- erly with your equipment matters. We will also explore antenna nal is only detectable within the feeders, cables, connectors, handy confines of your own property! accessories and test equipment. As Coming up! a practical Hands-On project, we’ll Part 5 of Teach-In will focus on build a useful variable frequency PE antennas, covering how several dipole antenna. Modulation depth can be easily determined from the waveform of the AM signal displayed on an oscilloscope. Fig.4.28 shows how this is done. If Vm is the peak-peak value of the modulating signal and Vc is the peak-peak value of the unmodulated carrier, the depth of modulation, M, Vm expressed as a percentage is calculated as M = (Vm ÷ Vc) × 100%. Using the values observed in Fig.4.28, M = 0.75 ÷ 1.5 × 100% = 50%. Vc Modulated carrier External modulation You might like to try an external modulation source instead of the 900Hz tone. This can be achieved by simply inserting a 3.5mm jack into the “Mod. Input” connector, SK2. The audio signal (speech or music) can be taken from any media player or even a small dynamic Practical Electronics | February | 2026 Fig.4.28: determining the modulation depth using an oscilloscope. Modulating signal 33