Silicon ChipCircuit Surgery - June 2026 SILICON CHIP
  1. Contents
  2. Publisher's Letter: An unfortunate misprint in the May issue / It isn't "sideloading"; it's the normal way to install software
  3. Feature: Power Electronics pt2: Controlling DC-DC converters (missing page)
  4. Feature: Teach-In 2026 by Mike Tooley
  5. Project: RGB LED 'Analog' Clock by Nicholas Vinen
  6. Project: USB Power Adaptor by Andrew Levido
  7. Feature: Circuit Surgery by Ian Bell
  8. Project: SSB Shortwave Receiver, part two by Charles Kosina, VK3BAR
  9. Feature: Max’s Cool Beans by Max the Magnificent
  10. Feature: Power Electronics Part 3: Isolated DC-DC Converters by Andrew Levido
  11. Feature: Audio Out by Jake Rothman
  12. Feature: Techno Talk by Max the Magnificent
  13. Project: 433MHz Digital Receiver Module by Tim Blythman
  14. Subscriptions
  15. PartShop
  16. Market Centre
  17. Advertising Index
  18. Back Issues

This is only a preview of the June 2026 issue of Practical Electronics.

You can view 0 of the 80 pages in the full issue.

Articles in this series:
  • Teach-In 12.1 (November 2025)
  • Teach-In 2026 (December 2025)
  • Teach-In 2026 (January 2026)
  • Teach-In 2026 (February 2026)
  • Teach-In 2026 (March 2026)
  • Teach-In 2026 (April 2026)
  • Teach-In 2026 (June 2026)
  • Teach-In 2026 (July 2026)
  • Teach-In 2026 (August 2026)
  • Teach-In 2026 (September 2026)
  • Teach-In 2026 (October 2026)
  • Teach-In 2026 (November 2026)
Articles in this series:
  • Circuit Surgery (April 2024)
  • STEWART OF READING (April 2024)
  • Circuit Surgery (May 2024)
  • Circuit Surgery (June 2024)
  • Circuit Surgery (July 2024)
  • Circuit Surgery (August 2024)
  • Circuit Surgery (September 2024)
  • Circuit Surgery (October 2024)
  • Circuit Surgery (November 2024)
  • Circuit Surgery (December 2024)
  • Circuit Surgery (January 2025)
  • Circuit Surgery (February 2025)
  • Circuit Surgery (March 2025)
  • Circuit Surgery (April 2025)
  • Circuit Surgery (May 2025)
  • Circuit Surgery (June 2025)
  • Circuit Surgery (July 2025)
  • Circuit Surgery (August 2025)
  • Circuit Surgery (September 2025)
  • Circuit Surgery (October 2025)
  • Circuit Surgery (November 2025)
  • Circuit Surgery (December 2025)
  • Circuit Surgery (January 2026)
  • Circuit Surgery (February 2026)
  • Circuit Surgery (March 2026)
  • Circuit Surgery (April 2026)
  • AUDIO OUT (May 2026)
  • Circuit Surgery (June 2026)
  • Circuit Surgery (July 2026)
  • Circuit Surgery (August 2026)
  • Circuit Surgery (September 2026)
  • Circuit Surgery (October 2026)
  • Circuit Surgery (November 2026)
Items relevant to "SSB Shortwave Receiver, part two":
  • SSB Shortwave Receiver PCB set [CSE250202-3] (AUD $15.00)
  • SI5351A clock generator module (Component, AUD $7.50)
  • Micrometals Amidon T50-6 toroidal core (Component, AUD $5.00)
  • SMD transistor - BF998 12V 30mA dual-gate depletion-mode Mosfet (SOT-143) (Component, AUD $2.50)
  • 16x2 Alphanumeric module with blue backlight (Component, AUD $10.00)
  • SSB Shortwave Receiver front panel [CSE250204] (PCB, AUD $7.50)
  • SSB Shortwave Receiver firmware (CSE25020A) (Software, Free)
  • SSB Shortwave Receiver PCB patterns (PDF download) [CSE250202-3] (Free)
Articles in this series:
  • Max’s Cool Beans (January 2025)
  • Max’s Cool Beans (February 2025)
  • Max’s Cool Beans (March 2025)
  • Max’s Cool Beans (April 2025)
  • Max’s Cool Beans (May 2025)
  • Max’s Cool Beans (June 2025)
  • Max’s Cool Beans (July 2025)
  • Max’s Cool Beans (August 2025)
  • Max’s Cool Beans (September 2025)
  • Max’s Cool Beans: Weird & Wonderful Arduino Projects (October 2025)
  • Max’s Cool Beans (November 2025)
  • Max’s Cool Beans (December 2025)
  • Max’s Cool Beans (January 2026)
  • Max’s Cool Beans (February 2026)
  • Max’s Cool Beans (March 2026)
  • Max’s Cool Beans (April 2026)
  • AOShop (May 2026)
  • Max’s Cool Beans (June 2026)
  • Max’s Cool Beans (July 2026)
  • Max’s Cool Beans (August 2026)
  • Max’s Cool Beans (September 2026)
  • Max’s Cool Beans (October 2026)
  • Max’s Cool Beans (November 2026)
Articles in this series:
  • Power Electronics Part 1: DC-DC Converters (April 2026)
  • SSB Shortwave Receiver (May 2026)
  • Power Electronics Part 3: Isolated DC-DC Converters (June 2026)
  • Power Electronics Part 4: AC-DC Converters with Rectifiers (July 2026)
  • Power Electronics Part 5: power factor correction & EMI fifiltering (August 2026)
  • Power Electronics Part 5: power factor correction & EMI fifiltering (September 2026)
  • Power Electronics Part 5: power factor correction & EMI fifiltering (October 2026)
  • Power Electronics Part 5: power factor correction & EMI fifiltering (November 2026)
Articles in this series:
  • Audio Out (January 2024)
  • Audio Out (February 2024)
  • AUDIO OUT (April 2024)
  • Audio Out (May 2024)
  • Audio Out (June 2024)
  • Audio Out (July 2024)
  • Audio Out (August 2024)
  • Audio Out (September 2024)
  • Audio Out (October 2024)
  • Audio Out (March 2025)
  • Audio Out (April 2025)
  • Audio Out (May 2025)
  • Audio Out (June 2025)
  • Audio Out (July 2025)
  • Audio Out (August 2025)
  • Audio Out (September 2025)
  • Audio Out (October 2025)
  • Audio Out (November 2025)
  • Audio Out (December 2025)
  • Audio Out (January 2026)
  • Audio Out (February 2026)
  • Audio Out (March 2026)
  • Audio Out (April 2026)
  • Audio Out (June 2026)
  • Audio Out (July 2026)
  • Audio Out (August 2026)
  • Audio Out (September 2026)
  • Audio Out (October 2026)
  • Audio Out (November 2026)
Articles in this series:
  • Techno Talk (February 2020)
  • Techno Talk (March 2020)
  • (April 2020)
  • Techno Talk (May 2020)
  • Techno Talk (June 2020)
  • Techno Talk (July 2020)
  • Techno Talk (August 2020)
  • Techno Talk (September 2020)
  • Techno Talk (October 2020)
  • (November 2020)
  • Techno Talk (December 2020)
  • Techno Talk (January 2021)
  • Techno Talk (February 2021)
  • Techno Talk (March 2021)
  • Techno Talk (April 2021)
  • Techno Talk (May 2021)
  • Techno Talk (June 2021)
  • Techno Talk (July 2021)
  • Techno Talk (August 2021)
  • Techno Talk (September 2021)
  • Techno Talk (October 2021)
  • Techno Talk (November 2021)
  • Techno Talk (December 2021)
  • Communing with nature (January 2022)
  • Should we be worried? (February 2022)
  • How resilient is your lifeline? (March 2022)
  • Go eco, get ethical! (April 2022)
  • From nano to bio (May 2022)
  • Positivity follows the gloom (June 2022)
  • Mixed menu (July 2022)
  • Time for a total rethink? (August 2022)
  • What’s in a name? (September 2022)
  • Forget leaves on the line! (October 2022)
  • Giant Boost for Batteries (December 2022)
  • Raudive Voices Revisited (January 2023)
  • A thousand words (February 2023)
  • It’s handover time (March 2023)
  • AI, Robots, Horticulture and Agriculture (April 2023)
  • Prophecy can be perplexing (May 2023)
  • Technology comes in different shapes and sizes (June 2023)
  • AI and robots – what could possibly go wrong? (July 2023)
  • How long until we’re all out of work? (August 2023)
  • We both have truths, are mine the same as yours? (September 2023)
  • Holy Spheres, Batman! (October 2023)
  • Where’s my pneumatic car? (November 2023)
  • Good grief! (December 2023)
  • Cheeky chiplets (January 2024)
  • Cheeky chiplets (February 2024)
  • The Wibbly-Wobbly World of Quantum (March 2024)
  • Techno Talk - Wait! What? Really? (April 2024)
  • Techno Talk - One step closer to a dystopian abyss? (May 2024)
  • Techno Talk - Program that! (June 2024)
  • Techno Talk (July 2024)
  • Techno Talk - That makes so much sense! (August 2024)
  • Techno Talk - I don’t want to be a Norbert... (September 2024)
  • Techno Talk - Sticking the landing (October 2024)
  • Techno Talk (November 2024)
  • Techno Talk (December 2024)
  • Techno Talk (January 2025)
  • Techno Talk (February 2025)
  • Techno Talk (March 2025)
  • Techno Talk (April 2025)
  • Techno Talk (May 2025)
  • Techno Talk (June 2025)
  • Techno Talk (July 2025)
  • Techno Talk (August 2025)
  • Techno Talk (October 2025)
  • Techno Talk (November 2025)
  • Techno Talk (December 2025)
  • Techno Talk (January 2026)
  • Techno Talk (February 2026)
  • Techno Talk (March 2026)
  • Techno Talk (April 2026)
  • Techno Talk (May 2026)
  • Techno Talk (May 2026)
  • Techno Talk (June 2026)
  • Techno Talk (July 2026)
  • Techno Talk (August 2026)
  • Techno Talk (September 2026)
  • Techno Talk (October 2026)
  • Techno Talk (November 2026)
Circuit Surgery Regular clinic by Ian Bell Measuring circuit frequency response using a PC sound card, part 9: differential signals and the THAT1646 IC O ver the past few months, we have been looking at circuit frequency responses, including implementing a measurement system using the ‘sound card’ (audio interface) of a PC or laptop together with a free app called REW (Room EQ Wizard). This was motivated by the need to measure the response of a practical implementation of an example digital filter (from our series on DSP) without using advanced lab test equipment. In the November and December 2025 issues, we described parts of the signal conditioning circuitry that might be needed to interface the circuit under test to the sound card’s line inputs and outputs (see Fig.1). Since then, we have covered various aspects of circuit theory related to frequency response and simulation techniques in LTspice to help us investigate this. Parts of the interface circuit may need to drive large capacitive loads, which can result in instability. This topic is closely related to frequency response analysis, while also being applicable well beyond the specifics of the sound card interface. The most recent articles have covered capacitive loading of op amps and techniques to mitigate the instability this can cause. The output from the sound-card-based measurement circuit to the computer’s audio interface was provided by a THAT1646 balanced audio line driver IC. However, we have not discussed this part of the system in detail until now. Balanced lines and differential signals use two conductors (in addition to ground). They are important and widely used in audio systems, as well as other electronic systems. We will mainly cover the basics of differential signals this month. As I ran into problems simulating the THAT1646 IC, we From soundcard line output Buffer Out Gain 0 to 3 Device under test will take a sidestep to look at how to deal with them. As with our discussion of op amp stability, these topics have wider applicability than just the frequency response measurement system. The THAT1646 and similar devices are better than typical op amps at handling capacitive loads, such as long audio cables. This was one of the reasons I used it, along with its capability of driving both single-ended and balanced audio inputs. Desktop PC audio interfaces (sound cards) typically provide standard consumer stereo audio line inputs, which are ideal for use with the measurement system. The system uses two signal paths, one for measurement and one for reference, so two inputs are required (see Fig.2). The signals from the measurement system are not in stereo, but that does not matter – they simply provide two streams of data that are interpreted as required by the measurement software. Laptops often only have a 3.5mm TRRS (tip, ring, ring, sleeve) headset connector, which provides stereo outputs and a mono microphone input. With this type of interface, it is not possible to feed in the two analog signals required by the measurement system. Furthermore, the single input is aimed at microphones, rather than audio line levels. An external audio interface connected by USB is required if the two-channel measurement process is to be used with such computers. The cheapest USB devices typically often only provide mono microphone inputs, but some provide two line-level inputs and two line-level outputs, similar to a PC. Some of these are aimed at home recording. Starting at a slightly highest cost, there Buffer Audio line driver GainOut 0 to 0.5 Out 2 Gain The THAT1646 line driver The THAT1646 is an audio differential line driver IC that claims improved performance over pin-compatible devices like the DRV134 and DRV135 from Texas Instruments and the SSM2142 from Analog Devices. This is due to a design approach that the manufacturer has trademarked as “OutSmarts”. It is a feedback-controlled balanced output driver that behaves properly when the load isn’t perfectly balanced, especially during clipping. Douglas Self described how to do something similar using op amps in his Small Signal Audio Design book (Chapter 15 [Line Outputs], pp386-387, “Quasi-Floating Outputs”). The THAT1646 IC is produced by THAT Corporation, a Massachusettsheadquartered IC manufacturer focusing on professional audio devices such as microphone preamplifiers, voltage-controlled amplifiers, line drivers, receivers and digital signal processors (DSPs). The THAT1646 is available in DIP-8, SO-8 and wide SO-16 packages. Fig.3 shows the internal circuit structure and PC Sound card Line R out L Line L in R In Device under test and signal conditioning Out To soundcard line input Fig.1: signal conditioning circuitry for sound card frequency response measurement. 28 are audio interfaces aimed at musicians and other professional audio applications. These often provide balanced (differential signal) inputs and outputs, which are common in professional audio. I have one of these (not a high-end one, unfortunately!) so another reason I used the THAT1646 was to experiment with using this unit, as well as the line inputs on my PC’s built-in interface. Fig.2: the setup for testing an electronic device using a sound card. Practical Electronics | June | 2026 Single-ended/Unbalanced THAT 1646 6 Vcc 10k 1 Out- 25 3 Gnd 5k 10k Din+ Dout- Cin+ 5k 10k 20k Receiver GND GND Sns2 Differential and/or Balanced vp Out+ Cin- Driver Din- Dout+ 10k 10k 5 Vee 10p 10k 25 20k Out– 7 Sns+ CEXT Out+ 8 Fig.3: the circuit structure and pinout of the THAT1646 (from the device data sheet). pinout for the DIP-8 and SO-8 versions. The core of the circuit is a fully differential amplifier. The resistors and capacitors form the feedback network, which is significantly more complex than a basic op amp amplifier. The op amps we have investigated in detail recently have differential inputs and a single output. They amplify the voltage difference between their inverting and non-inverting inputs and provide the amplified signal on their single output. The amplifier in the THAT1646 has a differential input like an op amp (Din+ and Din- in Fig.3) but also has a differential output – the output signal is between the two outputs (Dout+ and Dout-) rather than from a single groundreferenced output. A close look at Fig.3 will reveal that, although the internal circuitry uses a fully differential amplifier, and the output is differential, one of its 5kΩ input resistors is internally grounded, so the input to the THAT1646 is single-ended. A similar device, the THAT1606, has both differential inputs and outputs. The 5kΩ resistors at the inputs (along with the 10kΩ feedback resistors from Dout to Din) play a similar role to the gain-setting resistors in an inverting op amp amplifier. Whenever we have a differential signal between two points in a circuit, we can also have a common-mode component, which is the same at both points relative to ground (the average of the two signals). In a differential amplifier, the DC bias that keeps the transistors at their correct operating point is typically common-mode and needs to be stabilised using common-mode feedback. The amplifier in the THAT1646 has separate inputs for common-mode feedback (Cin- and Cin+). Practical Electronics | June | 2026 In Driver CEXT 4 In+ vs Out Differential & balanced signals Before discussing the device in more detail, we will look at the basics of differential signals and balanced connections. These terms can cause confusion and are sometimes incorrectly used interchangeably, particularly in audio; however, the terms do not have the same meaning. Both differential signals and balanced connections are used to improve signal integrity. Common uses include professional analog audio and low-voltage differential signalling (LVDS) in highspeed digital systems. Fig.4 shows scenarios where two systems are connected together with a driver sending a signal to a receiver. This is a generic situation; the signals could analog or digital and carry any kind of information. The upper diagram shows a single-ended connection, which is inherently unbalanced. The lower diagram could represent a balanced and/or differential connection. The single-ended connection is the most basic direct electrical output-toinput connection between components or systems. There is single signal conductor that carries a signal voltage (vs) referenced to ground. There also needs to be a good electrical connection between the driver and receiver grounds, as both ends must use the same reference for vs to be interpreted equally at both ends of the connection. Any current flow from driver to receiver must return along the ground connection. The ground connection could be various things, such as the ground plane on the PCB, a ground track in an IC, or a conductor in a cable, including the shield of a shielded cable. Both differential signals and balanced connections use two wires other than ground, so we can observe the voltage on each wire individually with respect vs vn In+ Receiver In– Fig.4: connection types and signals. to ground. The actual signal is equal to the difference in voltage between the two wires. If the two voltages on the two wires are vP and vN the signal is vs = (vP – vN ). In Fig.4, we labelled the differential signals or balanced connections as positive (P) and negative (N). In audio systems, these are often referred to as “hot” and “cold”. The signal is differential if it is symmetrical, that is, equal and opposite voltages on the two connections (so vP = -vN). There are advantages to this, but it is not essential, and one of the individual signals may be zero. The connection is balanced if the impedances are the same for both conductors. This is sometimes just stated as the impedance to ground, but all impedances (including the driver’s source impedance) and the impedance of the conductors themselves must be equal. The latter is important for longer connections where the total resistance or capacitance (for example) of an audio cable may be significant. In some situations, like very high-speed digital connections on a PCB, the characteristic impedance of the connection as a transmission line must be considered. This is not relevant to audio in normal domestic, studio, and live scenarios. You can have a differential signal on an unbalanced two-conductor connection. Similarly, signals on balanced connections do not have to be differential. The receiver for a differential signal or balanced connection must have a differential input. The greatest advantage in terms of signal quality will usually be obtained by using differential signals on a balanced connection. Having the signal voltage between two wires means that it is self-referencing – a ground connection between driver and receiver is not required to obtain an accurate voltage transfer. Also, current from one connection can return via the other. Transformers have long been used to provide balanced, electrically isolated 29 audio inputs and outputs (see Fig.5). However, modern driver and receiver ICs can provide high-quality balanced interconnections that are smaller and cheaper, usually with better signal quality. This is due to the complex frequencydependent behaviour of transformers, which may influence characteristics such as distortion and transient response. An advantage of transformers is that they provide full electrical isolation, which is important in some situations. If the signals are not galvanically isolated (no direct conduction path, eg, via transformers or opto-isolators), a ground connection is required between driver and receiver (shown dashed in Fig.4). This is to prevent possible ground voltage differences between the systems, taking circuits out of their operating range or even causing damage. Grounding issues between connected equipment can also lead to safety concerns if systems are faulty or safe wiring practices have not been followed. Floating outputs Another concept relevant to balanced connections is that of a floating output. Often this means a transformer output that provides galvanic isolation, but another important aspect of floating outputs concerns what happens if you short one output to ground. Although such shorts will not happen in circuits like LVDS connections in digital systems (unless there is a fault), it is not uncommon for balanced audio outputs to be connected to single-ended inputs, resulting in one output being grounded. Not all balanced/differential outputs will tolerate this, particularly if they are not ‘floating’. If we have a 1V peak-to-peak differential floating output from a transformer and we ground one of the transformer secondary terminals, we will still get a 1V signal. Not all differential-output amplifiers will behave this way, and assuming they can cope with the output short circuit, may be reduced to delivering 0.5V peak-to-peak if one output is shorted to ground. The THAT1646 does not do this; it will maintain the 1V output if one output is shorted. Furthermore, some differential-output amplifiers will experience excessive currents if driven into clipping with one output shorted. Again, the THAT1646 does not suffer from this problem, and so is marketed as better mimicking a true floating balanced output than some other line drivers. Out+ Amplifier Out– Floating, balanced output Fig.5: a transformer-coupled output. signal source in LTspice is to use a floating voltage source, as shown in Fig.6. The “Differential-input circuit” is just a graphic element on the schematic; there is no ground connection for source V1, so the P and N signals are floating. Unfortunately, due to the way the maths works in a SPICE simulation, the circuit in Fig.6 cannot be simulated. If you try, you get an error message: This circuit does not have a conduction path to ground! Please flag a node as ground. Fig.6: differential signal from a floating source in LTspice. on its own, giving the results shown in Fig.8. The V1 source produces a differential signal that is a 1kHz sinewave with a peak voltage of 1V (2V peakto-peak, which is shown in the upper plot). To display the differential signal, we plot vP -vN using the LTspice formula V(p)-V(n). Formula-based waveforms can be displayed via the “Add traces” item of the waveform window right-click menu. You can also display the differential signal via the schematic by first right-clicking on the N net and selecting “Mark Reference”. This will place a black probe symbol next to the net, as shown in Fig.7. Subsequent left-clicks on other nets will display the voltage on that net relative to the marked reference net. Clicking on the P net will display the differential signal, labelled as V(P,N) (voltage on P relative to N). You can also enter this format manually via The reason for this is that the voltage on nets P and N with respect to ground is not defined; only the voltage between P and N is set by V1. Therefore, LTspice cannot solve an equation to find V(p) and V(n), and as it cannot do this, it cannot run the simulation. This circuit in Fig.6 is abstract, as it just contains the ideal source; if we included the components for the differential-input circuit, we might create a conducting path to ground and the simulation would run. However, this is not guaranteed, as some common input circuits, such as a transformer primary or the LED in an opto-isolator would not do this. A possible solution is to add two very high-value resistors from the source output to ground, as shown in Fig.7. This allows us to simulate the source Fig.7: added resistors provide a path to ground. LTspice sources A simple way to create a differential 30 Fig.8: simulation results for the circuit in Fig.7. Practical Electronics | June | 2026 Fig.11: the circuit in Fig.9 with and AC common mode signals. is because the transistors in the circuit can be taken out of their correct bias conditions. DC common-mode voltages, where present in differential circuits, often relate to bias conditions, so they have to be correct for proper operation. However, in differential interconnections, a common-mode component is often due to non-ideal characteristics or external interference. The differential signal in the circuit in Fig.7 has a common-mode component of zero – we see that the two individual waves in Fig.8 are centred on 0V. Using a single source like this does not allow us to create a common voltage other than zero. We could add a DC offset to the sinewave from V1, but this would be a differential DC voltage, not a commonmode one. The circuit in Fig.9 has a differential voltage between nets P and N equal to the sum of the two sources, Vp and Vn. Each source must produce the same waveform at half the amplitude of the required differential signal. In this case, the two sources have an amplitude of 0.5V, so they produce a 1V, 1kHz sinewave Fig.9: creating a differential + common mode signal in LTspice. “Add traces” rather than the subtraction formula. Hitting the escape key will remove the reference probe – make sure you do this if you need to display a normal ground-referenced signal after using the reference probe. The two individual voltages (vP and vN ) on the two nets that carry the signal are shown on the lower plot – these are equal and opposite and have peak voltages of 500mV. Because they are opposite, the peak difference between them is 1V (2 × 500mV), which is the amplitude of the differential signal. Common-mode components As mentioned above, differential signals also have a common-mode component. The common-mode is not part of the wanted signal – it cancels out when taking the difference, but it may be important for circuit operation. For example, standard op amps may fail to operate correctly if presented with too high a common-mode input, even if the differential input signal is within the normal operating range. This differential signal, which is the same as that from the V1 source in Fig.7. The Vcm source produces the common-­ mode voltage, which is set to 1.5V DC. The simulation results are shown in Fig.10. The upper plot plane shows the differential signal, which is exactly the same as the differential signal in Fig.7. The lower plot plane shows the individual signals. These have the same amplitude and equal-and-opposite relationship as the corresponding signals in Fig.7, but are offset by the 1.5V DC common-mode voltage. If you take the values of Vp and Vn at any instant in time and find the average, it will be 1.5V – the common-mode voltage. We don’t have to use three voltage sources to create a differential signal with a non-zero common-mode component. We can use two sources; one for each of the differential signal nets. These need to be set to vCM + 0.5vD and vCM – 0.5vD, where vCM is the common-mode signal and vD is the differential signal. The advantage of the arrangement in Fig.9 is that it provides a clearer visual indication of the source of the commonmode part, which can be changed by editing just one source. Common-mode noise Fig.10: waveforms for the circuit in Fig.9. The differential signal is the same as in Fig.8, but it has different common mode components. Practical Electronics | June | 2026 Common-mode voltages do not have to be DC – they can be any signal form or wave shape. Fig.11 shows a version of the circuit in Fig.9 with a behavioural source (B1) replacing the DC commonmode voltage. The B1 source generates a dual sine with frequencies of 9kHz and 14kHz, both with 0.1V amplitudes. The differential signal is the same as in Fig.9 and Fig.7. The dual sinewave is achieved using the LTspice expression V=0.1*sin(2* pi*9000*time)+0.1*sin(2*pi*14000 *time) for the source. These sinewaves use the standard formula v(t) = sin(2πft) for a sinewave voltage (v) as a function of time (t) at a frequency of f hertz with no phase shift. The LTspice keyword time represents the current simulation time in the expression. 31 Fig.12 shows the results from Fig.11. The upper plane shows that the differential signal is the same as in the previous examples, although we have zoomed the time axis to facilitate seeing the higherfrequency common-mode signals. The individual voltages on the two nets carrying the differential signal, measured with respect to ground (Vp and Vn, green and yellow in the lower pane) look very different from the clean 1kHz sinewave differential signal (cyan, upper pane). The higher frequency signal could be noise induced onto the wires carrying the differential signal. The lower pane also shows Vp and Vn measured with respect to the common net (grey trace for Vp and brown trace for Vn). We see that the higher frequency commonmode signal moves in the same direction relative to the two halves of the differential signal and hence is ignored or cancelled out when the difference is taken. Fig.13 shows a plot of the commonmode signal. In the upper plane (red trace) is obtained by calculating the average of the signal on the two differential signal nets using the formula (V(p)+v(n))/2. In the lower plane is plotted directly as the signal on the common net (magenta trace). Fig.12: the simulation waveforms for the circuit in Fig.11. This shows the higherfrequency common mode signals. Noise immunity The preceding discussion shows that if we have two non-grounded wires carrying a signal between them into a differential amplifier, we have the potential to remove (cancel) any errors or interference that manifests as a common-mode signal. If this error is δ then the voltage on wire 1 will become v1+δ and the voltage on wire 2 will become v2+δ. The signal is the difference between the two wires, ie, (v1+δ) – (v2+δ) = (v1 – v2), which is the same as the difference signal without the induced noise. The individual wanted signals do not have to be symmetrical (as in a differential signal) for this work; the key thing is that the error or disturbance is the same on both connections. Electromagnetic interference is a common problem in electronic systems. An example of where this might occur is with a signal that is carried on long wires (eg, an audio cable) through an electrically noisy environment. If the interference is in an entirely different frequency range to the wanted signal, it may be straightforward to remove by filtering (assuming you know what filter to apply). However, if the frequencies overlap, as is often the case (eg, 50-60Hz mains and its harmonics are within the audio frequency range), differential processing is very useful. Electromagnetic interference is effectively a signal source coupled into the circuit or cable capacitively or 32 Fig.13. calculated and directly plotted common mode signal for the circuit in Fig.11. inductively. If the wires are close together and of the same physical structure and dimensions (as is often the case), they will experience the same interference source and the same amount of coupling. With other things being equal, the amount of voltage shift (δ) will depend on the impedance of the conductors and the circuits they connect to. If the impedances are equal, the voltage shifts on both conductors will be equal. This is why balanced connections are important in professional audio – it is impedance balance that facilitates the removal of interference by the differential input, not the use of a symmetrical differential signal. Differential signals provide additional advantages, so they are used in a wide range of electronic systems. Fully differential analog signal processing, where the whole circuit is differential, is often used in integrated circuits, where the circuits would typically be symmetrical between the signal paths, so inherently balanced. In this case, some non-idealities in the circuits will also be symmetrical and thus cancel, leading to improvements such as reduced distortion. Differential signals provide twice the signal amplitude too, which is useful in low-voltage circuits (common with modern ICs) for both analog and digital circuitry, increasing the dynamic range and improving the signal-to-noise ratio (SNR). For very high-speed digital circuitry, LVDS provides improvements in speed, timing accuracy and error reduction. Ground noise Another source of signal disruption in systems is ground noise, where there are fluctuations in the ground voltage difference between two systems. Ground noise appears as a common-mode signal to a differential amplifier, so is cancelled where balanced and differential connections are used. For single-ended connections, the noise is added to the wanted signal. A common cause of ground noise in audio is ground/Earth loops where there are two (or more) ground connections between equipment, which greats a loop. This may be due to multiple cables connected (with ground connections) and/or the mains wiring in cases where the equipment is Earthed. This effect can disrupt other systems too, such as sensor readings. Practical Electronics | June | 2026 Simulation files Most Circuit Surgery columns feature the use of the free circuit simulation software LTSpice. It is used to support descriptions and analysis in Circuit Surgery. The examples and files for this issue are available for download: https://pemag.au/link/acb7 Fig.14: an LTspice example circuit for a differential connection with source and load impedances and disturbance sources. Fig.15: the simulation results from the circuit in Fig.14 with the lines balanced. The gap is where the plot switches between the interference and ground noise results. Fig.16: the simulation results from the circuit in Fig.14 with the lines unbalanced (showing interference and then ground noise). The ground loop acts like the secondLTspice examples ary of a transformer, with electromagnetic Fig.14 shows a differential signal source fields inducing currents into the ground (Vp and Vn), which is similar to Fig.11, conductors, creating a voltage across the but without the common-mode source. wiring resistance. This is often at the There are individual source resistances mains frequency, so it produces hum of 50Ω (Rsn and Rsp) before the conducin the audio. tors (P and N) connecting the signals to Another source of ground noise is the a differential input circuit that presents supply current taken by the system or other individual input resistances (Rin and systems sharing the same power wiring. Rip) of 1kΩ to the signals on P and N. As the current changes (eg, changing with The fact that Rsp=Rsn and Rip=Rin the mains voltage cycle), the voltage drop means that the connection from the across the ground resistance changes, prosources to Din+ and Din- is balanced. ducing a voltage shift. This can occur in a As previously indicated, Din+ and wide range of scenarios, including within Din- are just graphical items on the ICs. Most of these effects can be avoided schematic representing a differential amor mitigated through the use of balanced plifier input; the actual signals are P and and/or differential connections. N. The differential amplifier behaviour Practical Electronics | June | 2026 will be obtained via waveform maths, V(p)-V(n), as in the previous examples. The circuit also contains two disruption sources. The voltage source Vinterference is coupled to P and N via capacitors C1 and C2, which represents the potential effects of an interfering electric field on the connection. There is also a voltage source (Vgnd_ noise) between the grounds of the source and the differential input circuit. This represents any mechanism that introduces disturbance in the ground line, producing a voltage difference between the driver and receiver grounds. Each disruption source produces a 0.4ms square pulse, with the interference starting after 0.8ms and the ground noise after 1.8ms. The component values and source configurations were chosen to produce clear illustrative waveforms and are not aimed at representing a specific physical circuit or conditions. In the following simulations, only one disruption effect is simulated at a time. Either C1 and C2 are temporarily removed, with Vgnd_noise active, or Vgnd_noise is set to 0V. Both are shown active in Fig.14 for convenience. Fig.15 shows the results from two simulations of the circuit in Fig.14 combined on one plot. Up to the gap just after 1.6ms, the results are for the capacitively coupled interference, and after that for the ground noise. In both cases, we can clearly see the disruption to the individual signals (upper pane, green and yellow traces) and that the differential signal (lower pane, cyan trace) is free from disruption. Fig.16 shows another run of the same simulation, except that the resistance values in the N connection have been changed to Rsn=200Ω and Rin=4kΩ. These values maintain the source and input impedance potential divider ratio, and hence the signal amplitude, but unbalance the line impedance. In this case, we see that although the wanted differential signal on P and N is perfectly symmetrical, the interference affects the output signal because the response of the lines to the interference is not equal. The ground noise is a common-mode signal in this setup, so it is still rejected. 33 Fig.17 shows a single-ended, unbalanced version of the circuit in Fig.14. There is a single-ended source connected to the Din+ differential input and the Din- is connected to the source ground. The signal source voltage is double that of the two individual sources in Fig.14 so that the signal is the same amplitude (at 1V peak). The results in Fig.18 show that both the interference and ground noise disrupt the signal. Fig.19 shows a version of Fig.14 with a balanced line driven by a singleended source (providing the same overall amplitude of 1V). Fig.20 shows the results, where we can see there is no disruption to the output. This confirms that the signal on a balanced line does not have to be differential to obtain noise immunity. These simulations have implemented the differential input using waveform maths to provide a perfect differencing operation. Of course, real systems will not respond to their differential inputs perfectly – they will also respond to some extent to any common-mode signals, rather than completely rejecting them. Performance in this respect is characterised by common-mode rejection ratio (CMRR) – the ratio of differential gain to common-mode gain. Given an imperfect (finite) CMRR, the common-mode signal should be reduced as much as possible to maximise the received signal quality. This is largely up to the quality of the differential amplifier in the receiver, but can be helped by good wiring practices, cable shielding and RF suppression to reduce common-mode noise and interference. Furthermore, a good differential-output amplifier at the source will reduce common-mode signals on the line. Devices like the THAT1646 can help fulfil this requirement while providing other advantages of differential signals, such as higher signal amplitude. Fig.17: like Fig.14 but with a singleended source and unbalanced connections. Fig.18: simulation results from the circuit in Fig.17 (interference then ground noise). THAT1646 simulation Fig.21 shows an LTspice simulation for a minimal THAT1646 circuit. The SENS+ inputs can be directly connected to their respective outputs, but using the capacitors (C1 and C2) reduces the common-mode output (per the data sheet). The 100kΩ load resistors (R1 and R2) and input buffer amplifier (U1) provide more realistic I/O conditions than directly driving the device from an ideal source and leaving the outputs unloaded. THAT Corporation’s SPICE models (including the THAT1646) can be downloaded in a single zip file from https:// thatcorp.com/device-models/ The micromodel is in the file “1646_ Macro_02.lib”. You also need a symbol, which can be generated by opening the .lib file in LTspice, right-clicking on the .SUBCKT line in the text and selecting “Create Symbol” from the context menu. 34 Fig.19: like Fig.14 but with a singleended source and balanced connection. The symbol in Fig.21 was edited to move the pins to more convenient locations. The symbol and model files should be placed in the user library directory (see Tools → Settings → Search paths) from the main menu. When I first ran this simulation, it was very slow, although it did complete successfully. The results in Fig.22 show the single-ended input (upper pane) and differential output (lower pane). Simulation problems can sometimes happen with the macromodel models provided for devices. The Status Bar (see Fig.23) confirmed that LTspice was struggling. LTspice’s Status Bar The Status Bar is a single line of text in LTspice that provides information on items at the mouse location for the currently in-focus window or gives updates on a running simulation. For schematic components, it shows editing actions and informs you of the names of nets. After running a simulation, you also get information on operating points and Practical Electronics | June | 2026 Fig.20: simulation results from the circuit in Fig.19 (interference then ground noise). Fig 21: an LTspice schematic with the THAT1646. Fig.22: results from simulating the circuit in Fig.21. Fig.23: the LTspice status bar during a simulation. to run, you can watch the status as it propower dissipation for components, plus gresses. Sometimes LTspice will struggle prompts on actions to display results. to simulate a circuit and run very slowly. For waveform windows, the Status Bar At such times, you may notice some shows the x and y values of the mouse cryptic information presented along with position in the graph area. This is not the straightforward time and progress the same as the attached cursors, as the data. You may see values for “Def Con”, values displayed are not locked to a trace “Inter” and “Fill-ins” (see Fig.23). on the graph, but this can be useful for a While you wait for the simulation, you quick measurement by placing the mouse might decide to pass the time by looking cursor on the relevant point on the trace. these up in the LTspice help, but you will For a simulation that takes some time Practical Electronics | June | 2026 be disappointed as they are not documented there. There is very little information published on these parameters, although on a basic level they relate to how challenging LTspice is finding the simulation. You might recognise DEFCON as the defence readiness condition used by the US armed forces, which ranges from 1 (normal) to 5 (maximum, nuclear war imminent or already started). For LTspice, Def Con is a little less dramatic – it indicates the level of difficulty the simulator is experiencing from zero upwards (it is not limited to five values). Fill-ins may relate to the “number of elements of the system matrix that changed from zero to non-zero during LU factorization” according to a recent academic paper by Marek Nałęz investigating the efficiency of modelling techniques running in LTspice, which used the number of fill-ins as a measure of circuit complexity. LU means lower-upper and refers to lower and upper triangular matrices. A matrix is a rectangular array of numbers, or other mathematical values, and is triangular for a square matrix if all the values above or below the main diagonal are zero. Matrix mathematics is used by LTspice to solve the multiple interrelated circuit equations to run simulations. As an LTspice user, it is not necessary to know the details of the algorithms being used, but having some idea of the processes involved can be helpful when things go wrong. The calculations behind SPICE circuit simulation fall into a branch of mathematics called numerical methods, which provide a way of solving problems that cannot be solved analytically. Put crudely, this involves guessing the answer and using the results to find a better approximation of the solution. The process is repeated (iterated) until the approximation is sufficiently accurate. This is not a new idea; its basis goes back to Isaac Newton (1642-1727). Unfortunately, numerical methods can sometimes fail to find a solution or take a long time. LTspice has a variety of settings that influence its algorithms, found in Tools → Settings → SPICE. Using incorrect values here can mess things up (but there is a restore defaults button). A useful thing to try with slow simulations is to change the Solver from Normal to Alternative (in the Engine section of the dialog). In this case, it sped up the simulation by a factor of about 25. Conclusion We introduced the THAT1646 IC this month, but after a detailed look at differential and balanced signals, and discussion of the status bar and slow simulation, we did not look at it in much detail. So we will continue with this PE topic next month. 35