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Max’s Cool Beans By Max the Magnificent Weird & Wonderful Arduino Projects Part 7: predictably random I 'm so eager to plunge into the heart of this month’s column that I can barely restrain myself. Let’s take a moment to remind ourselves where we left things last time. We started by adding a 74HC595 serial-­in, parallel-out (SIPO) shift register integrated circuit (IC) to our breadboard. We connected this shift register’s SER (‘serial data’) input to logic 1, and we used its outputs to drive the lightemitting diodes (LEDs) on our 8-segment bar graph display. We also added three momentary pushbutton switches to the breadboard, along with corresponding pull-up and pull-down resistors. Initially, we used these switches to directly drive the shift register’s SRCLR (‘shift register clear’), SRCLK (‘shift register clock’), and RCLK (‘output register clock’) control pins. However, we soon ran into the problem of switch bounce. To address the switch bounce problem, we disconnected the signals from the switches to the shift register and instead fed them to three of our Ar- SRCLR SRCLR SRCLK SRCLK RCLK RCLK debouncing code so that pressing the SRCLK switch resulted in a positive pulse (⎍) on the SRCLK signal to the shift register, followed by a positive pulse on the RCLK signal to the shift register. Similarly, pressing the SRCLR switch ⎍ resulted in a negative pulse ( ) on the SRCLR signal to the shift register, followed by a positive pulse on the RCLK signal to the shift register. You can further refresh your memory by downloading an image showing the current state of the breadboard in the file named CB-july25-brd-01.pdf, along with a copy of our latest and greatest program in the file named CB-july25code-01.txt. These are found within the July 2025 download package on the PE website at https://pemag.au/link/ac5q. Fabulous feedback Feedback is a crucial concept in both analog and digital circuits. In the case of analog circuits, which work with continuous signals (that can take on a practically infinite number of values within a given range, and that change smoothly over time without steps), feedback refers to the process whereby a portion of the output signal is fed back into the input to affect the behaviour of the circuit. (+5V) VCC 6A 6Y 5A 5Y 4A 4Y 14 13 12 11 10 9 8 ~10 ~9 8 7 ~6 ~5 4 ~3 2 TX-1 RX-0 To shift register duino Uno inputs. We then connected three of the Arduino’s outputs to the inputs on the shift register (see Fig.1). Next, we created a simple software routine to debounce the signals coming from the switches, and we used these debounced versions to control our shift register. We had been using the three control signals individually. This meant that after pressing either of the SRCLK or SRCLR switches to modify the contents of the shift register, we were obliged to press the RCLK switch to copy the new contents from the shift register into its output register. The result was an excessive amount of switch pressing on our part. Thus, we concluded that column by noting that one of the advantages of running our signals through the Arduino is that we can write our software such that a single stimulus signal can be used to trigger multiple responses. To cut a long story short (not how I usually like to do things), Fig.3 shows how we modified our switch DIGITAL I/O (PWM ~) Arduino Fig.1. the current state of our breadboard. 26 RCLK SRCLK SRCLR 1 2 3 4 5 6 7 1A 1Y 2A 2Y 3A 3Y GND (0V) Fig.2: the 74xx04 IC contains six inverters. Practical Electronics | July | 2025 The most common type of feedback used in analog circuits is negative feedback, which is employed for tasks like stabilising the circuit, reducing distortion, improving bandwidth, and increasing linearity. By comparison, positive feedback amplifies the signal and can lead to instability, but it can also be used intentionally in circuits like oscillators, where it’s needed to generate continuous waveforms. In digital circuits, which typically work with discrete 0 (low) and 1 (high) signals, feedback is primarily used to implement and control the state of memory elements, like flip-flops, registers, counters, and more. Consider Fig.4(a), with a constant ‘1’ being fed into a shift register, which is the way the chip on our breadboard is currently configured. Now compare this with Fig.4(b), in which the output from the shift register is first inverted and then fed back into the input. As an aside, whenever I see a shift register with feedback in this form, I cannot help but think of the Ouroboros, an ancient symbol depicting a snake (or a dragon) eating its own tail. Adopted as a symbol in both Gnosticism and Hermeticism, the Ouroboros is often interpreted as a symbol for eternal cyclic renewal or a cycle of life, death, and rebirth. Bob would be proud Way back in the mists of time that we used to call October 2024, in our Arduino Bootcamp column, we introduced the American inventor, engineer, computer pioneer, and professor, Robert Royce “Bob” Johnson (1928–2016). Amongst many other inventions and innovations, Bob came up with something we now call the Johnson counter. In fact, Fig.4(b) is a classic implementation of a Johnson counter. While it’s certainly fun to think about this sort of thing theoretically, it’s even more enjoyable to see it in action, so that’s what we will do. Since I know more than my fair share of people called Bob, I cannot help but think of a Johnson counter as being a Inactive Bounce 0 1 2 3 4 5 6 7 SRCLK switch is activated SRCLK to SR Positive pulse to shift register RCLK to SR Positive pulse to shift register SRCLR from SW SRCLR switch is activated SRCLR to SR Negative pulse to shift register RCLK to SR Positive pulse to shift register Fig.3: with software, one stimulus can trigger multiple responses. Bob counter. As part of our bootcamp columns, we introduced the 74xx04 IC, which contains six inverters, aka NOT gates (Fig.2). The reason I’m using “xx” in the 74xx04 device name is that there are various ‘flavours’ of the chip that essentially do the same job. You could use a 74LS04 (low-power schottky TTL) or a 74HC04 (high-speed CMOS) version of the chip, or perhaps something else. Given a choice, the HC technology is better here because it’s more tolerant of input voltage variations. We are going to add one of these devices to our breadboard, as illustrated in Fig.5 (a corresponding image of the full board is available in the file named CB-july25-brd-02.pdf). Although I’ve shown this deployment in one fell swoop, it’s best to take things one step at a time. First, make sure everything is powered down, then add the 74xx04 to the breadboard along with its red (+5V) and black (0V) connections and associated ceramic capacitor. Power things up again and use your multimeter to verify that we see +5V (give or take) on pin 14 and 0V on pin 7. The fastest and easiest way to check this is to set your multimeter to the 20V Fig.4: adding feedback to a shift register. 0 1 2 3 4 5 6 7 (b) With feedback Practical Electronics | July | 2025 DC range (or whatever range is closest to, but higher than, 5V), then place the red and black probes on pins 14 and 7 of the 74xx04, respectively. You should see a reading of +5V (give or take), indicating that all is well. If you see a reading of -5V (give or take), then either you have your probes on the wrong pins, your probes are plugged into the wrong input jacks on your multimeter, or you’ve connected the wires incorrectly on your breadboard. If you see a reading of 0V, then one or both of your red and black wires are either broken, connected to the wrong IC pin, or connected to the wrong rail. A quick visual check may resolve the concern. If not, then proceed to the next step. Hopefully, you already have header pins plugged into the power and ground rails somewhere on your breadboard. If not, add a couple as shown in Fig.5. Do not place these header pins next to (or even close to) each other, because Remove 74xx04 74HC595 h’ Fig.5: adding the 74xx04 to our breadboard. (a) Constant ‘1’ input SER Inactive Bounce SRCLK from SW 1 SER Active h’ Header pin (for probing +5V) Header pin (for probing 0V) 27 Johnson Counter State a b c d e f g h 1 0 0 0 0 0 0 0 0 2 1 0 0 0 0 0 0 0 3 1 1 0 0 0 0 0 0 4 1 1 1 0 0 0 0 0 5 1 1 1 1 0 0 0 0 6 1 1 1 1 1 0 0 0 7 1 1 1 1 1 1 0 0 8 1 1 1 1 1 1 1 0 9 1 1 1 1 1 1 1 1 10 0 1 1 1 1 1 1 1 11 0 0 1 1 1 1 1 1 12 0 0 0 1 1 1 1 1 13 0 0 0 0 1 1 1 1 14 0 0 0 0 0 1 1 1 15 0 0 0 0 0 0 1 1 16 0 0 0 0 0 0 0 1 1 0 0 0 0 0 0 0 0 Fig.6: an 8-bit (16-state) Johnson counter. it’s easy to short them out with your multimeter probe if you aren’t careful or if your attention wanders (don’t ask me how I know this). Connect the black probe to the 0V header pin and the red probe to pin 14 on the IC. If you don’t see +5V (give or take), then power everything down, replace the red wire on your breadboard, and return to the beginning of the test procedure. If you do see +5V, then place the red probe on the +5V header pin and the black probe on pin 7 on the IC. If you don’t see +5V (give or take), then power everything down, replace the black wire on your breadboard, and return to the beginning of the test procedure. Once you are happy that the chip is powered as expected, power things down once more. We are going to use the NOT gate with its input and output at pins 9 and 8 on the 74xx04, respectively. It’s always good practice to make sure that any unused inputs to logic devices have associated pull-up or pull-down resistors (see my How to Handle the Inputs to Unused Logic Gates column for more details; pemag.au/link/ac55). So, let’s add five 10kΩ pull-up resistors to the inputs of the unused gates on pins 1, 3, 5, 11, and 13, ensuring that these gates cannot start oscillating or draw excessive power. You may call me overcautious (I’ve been called worse, and by my dear old mum at that), but it really wouldn’t hurt to power things up, connect your black multimeter probe to IC pin 7 (or to the 28 the SRCLK switch and watch the 8-bit (16state) Johnson counter a a sequence unfold on the y y ^ ^ bar graph display, as ilb b lustrated in Fig.6 (the 0s and 1s in the table correa b y a b y spond to LED segments on the display being off 0 0 0 0 0 1 and on, respectively). 0 1 1 0 1 0 Personally, I think 1 0 1 1 0 0 this is awesome. I’ve just 1 1 0 1 1 1 spent more time than might seem reasonable Fig.7: symbols and truth tables for XOR and XNOR gates. playing with this little beauty. But I can hear 0V header pin), use your red probe to you crying, “I want more!” Well, never verify that you see +5V (give or take) let it be said that I failed to serve. on pins 1, 3, 5, 11 and 13, then power everything down again. Meet the LFSR We’re almost there. Connect the A linear feedback shift register shift register’s h’ output (pin 9 on the (LFSR) is a shift register that operates 74HC595) to the NOT gate input (pin 9 with a linear function of its previous on the 7404). Pay attention! This can be state to generate a sequence of bits. a tad confusing because the 74HC595 These functions are commonly used and 74xx04 chips are in 16-pin and for tasks like pseudo-random number 14-pin packages, respectively, which generation, cryptography, error detecmeans their pin 9s are in different lo- tion and data scrambling. cations. At the heart of an LFSR is a series Finally, remove the resistor that’s of flip-flops that shift their contents at currently connecting the shift register’s each clock cycle, just like our 74HC595. SER (‘serial data’) input (pin 14 on the However, unlike our Johnson counter, 74HC595) to logic 1, then connect the in which we fed the inverted version NOT gate output (pin 8 on the 7404) of the last bit back into the input, in to the shift register’s SER input (pin the LFSR, multiple register bits (taps) 14 on the 74HC595). are XORed (or XNORed) together and Are you ready to rock and roll? I fed back to the input. know I am! Before we proceed, let’s briefly remind ourselves as to the symbols Bob’s your uncle and truth tables associated with an Power everything up. As we dis- XOR (‘exclusive OR’) gate and its invertcussed last month, according to its ing counterpart, the XNOR (‘exclusive data sheet (pemag.au/link/ac1o), the NOR). These are illustrated in Fig.7 (I’ll 74HC595 doesn’t contain any special explain why it’s “XNOR” rather than power-on-reset (PoR) functionality to “NXOR” in my next column when clear its internal registers and initial- we delve deeper into logic functions). ise them with values of 0. Observe the ‘bobble’ (or ‘bubble’) on Thus, every time we apply power to the output of the XNOR symbol. This the breadboard, we may end up with indicates an inverted output, which, the chip’s output register containing in this case, means the output is ina random collection of 0s and 1s, re- verted compared to that from the XOR. sulting in corresponding off and on To help us wrap our brains around LED segments that are different every this, let’s start by assuming that we are time power is removed and reapplied. working with a small collection of 3-bit Similarly, the chip’s internal shift shift registers (Fig.8). As we know, all register, whose contents we won’t see the register bits share a common clock, until we copy them to the output reg- which we’ve omitted from these diaister, may also contain a random as- grams to keep things simple. sortment of 0s and 1s. So, just to be The register bits are numbered 0, on the safe side, press and release the 1, and 2. Alternatively, we can think SRCLR (right-hand) switch. of these as being named a, b, and c to As we discussed earlier (Fig.3), our match the outputs from our 74HC595 current program will use this event chip. For the purposes of this portion ⎍ to present a negative pulse ( ) on the of our discussions, let’s assume the SRCLR signal to the shift register, fol- register is loaded with an initial value lowed by a positive pulse on the RCLK of 001 in binary. signal to the shift register, thereby enIn our first example, shown in suring that all register bits contain 0. Fig.8(a), the tap points are bits 1 & 2, Now repeatedly press and release which we can refer to as [1,2]. Also, we XOR XNOR Practical Electronics | July | 2025 (a) XOR [1,2] (b) XOR [0,2] ^ ^ 0 SER 1 (a) (b) a 0 1 0 1 1 1 0 0 1 0 clock state -1 2 3 4 5 6 7 8 9 (c) XNOR [0,2] 1 2 3 4 5 6 7 1 2 3 ^ 2 0 (c) SER b c clock state 0 0 1 0 1 1 1 0 0 1 1 0 0 1 0 1 1 1 0 0 -1 2 3 4 5 6 7 8 9 1 2 3 4 5 6 7 1 2 3 1 (a) (b) a 0 1 1 1 0 1 0 0 1 1 Initial state 2 0 (c) SER b c clock state 0 0 1 1 1 0 1 0 0 1 1 0 0 1 1 1 0 1 0 0 -1 2 3 4 5 6 7 8 9 1 2 3 4 5 6 7 1 2 3 1 2 (a) (b) a b c 0 0 1 0 1 1 0 0 0 1 0 0 0 1 0 1 1 0 0 0 1 0 0 0 1 0 1 1 0 0 All 1s (c) All 0s Fig.8: alternative tap and feedback functions for LFSRs. are using an XOR gate to implement our feedback function. Observe that the register cycles through all possible combinations of 0 and 1s, including 111, but excluding 000. In the case of our second example, shown in Fig.8(b), we stick with our XOR feedback function from Fig.8(a), but we use taps of [0,2]. As we see, the Fig.8(b) implementation follows a different sequence to its Fig.8(a) counterpart, but it still cycles through every combination of 0s and 1s, excluding 000. Finally, in the case of our third example shown in Fig.8(c), we keep our [0,2] taps from Fig.8(b), but exchange the XOR for an XNOR to implement our feedback function. In this case, the register follows a different sequence, cycling through all possible combinations of 0 and 1s, excluding 111, but including 000. A binary field with n bits can assume 2n unique combinations of 0s and 1s; for example, a 3-bit field can support 23 = 8 different values. The sequence depends on the tap points we select. XNOR ^ 0 SER (a) 1 (b) 2 (c) 3 (d) 4 (e) In many cases, an LFSR will end up cycling around a loop comprising a limited number of states. In some cases, the LFSR will cycle through (2n – 1) states, which means every possible state apart from all 0s with an XOR feedback path or all 1s with an XNOR feedback path. In such a case, it’s classed as a maximal-length LFSR. Since all three examples in Fig.8 repeatedly cycle through (23 – 1) = 7 states, they are indeed maximal-length LFSRs. Implementing our own LFSR What we are going to do now is use our 74HC595 8-bit shift register to implement our own LFSR. Unfortunately, we have a couple of teeny-tiny problems. Let’s start with the fact that each LFSR supports some number of tap combinations that will result in maximal length sequences and many combinations that… don’t. The trick is weeding out the one we want. Many moons ago, I was happy to find a book that provided tables detailing maximal length LFSR tap points for registers with different numbers of bits. After some investigation, I was disappointed to 5 (f) 6 (g) 7 (h) (a) 7-bit LFSR with an XNOR. NOT XOR 1. Live with the distraction. 2. Remove the series resistor associated with bit 7 of the bar graph display. 3. Cover the offending segment on the display with a bit of tape (that’s what I did). The reason we wish to use an XNOR gate rather than XOR is that, when we initialise our shift register, it is cleared to all 0s. If we used an XOR gate in our feedback path, that’s the way it would stay, because 0 XOR 0 = 0. By comparison, 0 XNOR 0 = 1, which will get us out of the initial all-0s state. This is where we come to the second problem, which is that we don’t actually have an XNOR gate at our disposal. Such chips are available, but we don’t have one in our arsenal of popular SN74xx00 chips that we previously purchased as part of the Arduino Bootcamp series (pemag.au/ link/ac2k). What we do have in that kit is a 74xx86, which is a quad 2-input XOR chip (Fig.10). We can implement the (+5V) VCC 14 0 (a) 1 (b) 2 (c) 3 (d) 4 (e) 5 (f) 6 (g) (b) XOR + NOT = XNOR Practical Electronics | July | 2025 7 (h) 4B 13 4A 12 4Y 11 3B 10 ^ Fig.10: the 74xx86 quad XOR IC. ^ SER Fig.9: a 7-bit LFSR only requires one XOR gate. discover that many of these tap combinations were… well, not to put too fine a point on it… wrong. As a result, I ended up writing a C program to generate my own humble tabular offering (I pride myself on my humility), which I documented in my Bebop to the Boolean Boogie book. The next problem we have is that the minimal number of taps for an 8-bit maximal length LFSR is four. One such tap combination is [1,2,3,7], but this would require us to use three XOR gates. That wouldn’t normally be a problem per se, but—for reasons to be disclosed in the future—I wish to use only a single XOR or XNOR gate. Thus, what we are going to do is use our 74HC595 to create a 7-bit LFSR using two taps at [0,6], as per Fig.9. We are not interested in poor old bit 7 in for this implementation, so it will simply be a copy of whatever used to be in bit 6 from the previous clock. If you find this distracting, you have three main options: 3A 9 3Y 8 ^ ^ ^ 1 2 3 4 5 6 7 1A 1B 1Y 2A 2B 2Y GND (0V) 29 XNOR function by simply inverting the output from an XOR, as illustrated in Fig.9(b). Fortunately, we already have our handy-dandy 74xx04 hex inverter (NOT) chip ready and waiting for us on our breadboard. If you didn’t purchase the kit of SN74xx00 chips but instead opted to buy only the 74xx04 (hex inverter) and 74xx08 (quad 2-input AND) we used as part of the clock we constructed in our Arduino Bootcamp series, then… you’re up the proverbial creek without a paddle. I’m joking; there is a solution based on the parts we already have, but you’ll need to wait until our next column to find out more. In the meantime, you’ll just have to read along with the rest of us. Or go out and buy a 74xx86 chip (most large electronics retailers will sell at least one variant). Assuming you have the 74xx86, add it to your breadboard as illustrated in Fig.11 (a depiction of the full board is available in the file named CB-july25brd-03.pdf). Do this in stages, like we did for the 74xx04. Start by adding the 74xx86 with its power and ground connections (and ceramic capacitor), and verify everything is as expected. Next, add 10kΩ pull-up resistors to the unused gate inputs. We’re going to use gate 2 in Fig.10, so add pullups to gate 1 (pins 1 and 2), gate 3 (pins 9 and 10, and gate 4 (pins 12 and 13). While it might work even if you don’t do this, we want to adopt good habits (we already have enough bad ones). Now we need to connect our tap points [0,6] from the 74HC595 to the inputs of our XOR. It doesn’t matter which of the taps is connected to which of the XOR inputs. I connected pins 15 and 6 (corresponding to taps 0 and 6) on the 74HC595 to pins 4 and 5 on the 74xx86, respectively. As illustrated in Fig. 11, remove the wire connecting pin 9 of the 74HC595 to pin 9 on the 74xx04. Again, this can be a tad confusing because the 74HC595 and 74xx04 chips are in 16-pin and 14-pin packages, which means their pin 9s are in different locations. Pin 9 on the 74HC595 is its h’ output, which we were using to implement the Johnson counter and which we can think of as tap [7], although we aren’t going to use it as such. Meanwhile, pin 9 on the 74xx04 is the input to the NOT gate. Now connect the output from the XOR (pin 6 on the 74xx86) to the input of the NOT gate (pin 9 on the 74xx04). Happily, the output from the NOT gate (pin 8 on the 74xx04) is already connected to the SER input on the shift 30 Remove From Arduino 74xx86 74xx04 74HC595 To display Fig.11: adding the 74xx86 quad XOR chip to our breadboard to make the LFSR. register (pin 14 on the 74HC595) from our previous experiment. Testing our LFSR Power everything up and then press and release the SRCLR (right-hand) switch, thereby clearing our LFSR to contain all 0s. Now, press and release the SRCLK (middle) switch 16 times, pausing after each press to verify that the pattern of segments on the display matches the corresponding pattern of 0s and 1s shown in Fig.12. I created this table in my office at work before verifying it on the hardware at home. Before you click further, why don’t you use a pencil and paper to calculate the next six values (states 18 through 23), and then press and release the SRCLK button six more times, checking your work along the way? Even though we are using only one 2-input XNOR gate in our feedback path, this still requires some mental gymnastics (so make sure you limber up first). Observe the values in the “Decimal” column in Fig.12. These are the decimal equivalents of the binary 0s and 1s. They make it easy to see the pseudo-random nature of the numbers being generated. ‘Pseudo-random’ refers to something that appears random, but that is actually deterministic, meaning it follows a predictable sequence based on an initial ‘seed’ or starting point. In this case, our seed is the all 0s value. Press and release the SRCLR switch to reset our LFSR to its initial value. Then, repeatedly press and release the SRCLK button, and you will see that the same sequence of ‘randomish’ numbers is generated. We expect this to be a maximallength implementation, but we should make sure that this is indeed the case. Since we are working with a 7-bit LFSR, we expect to see (27 – 1) = 127 unique states, Use the SRCLR switch to reset the LFSR, then repeatedly press and release the SRCLK button, counting each press as you go, and verify that the LFSR returns to its all 0s state on the count of 127. Suppose we were to change our taps from [0,6] to [1,6]. Would this also result in a maximal-length implementation? I don’t know. But I do know how to find out… Homework assignment #1 Our current implementation utilises a 2-input XNOR function, as illustrated in Fig.9(a). We implemented this function using a combination of an XOR gate and a NOT gate, as in Fig.9(b). I have two tasks for you to ponder before we meet again: one easy and one… not. Easy: suppose we had only our 74xx86 chip containing its four 2-input XOR gates (so, no 74xx04 with its six NOT gates, and no 74xx08 with its four 2-input AND gates). Can you think of a way to implement the desired XNOR function? Not easy: suppose we had only our 74xx04 with its six NOT gates and our 74xx08 with its four 2-input AND gates (so, no 74xx86 with its four 2-input XOR gates). Can you think of a way to implement the desired XNOR function? Take a stab at these provocative posers and see how well you do. I will reveal all when next we meet. What’s that noise? Now it’s time to revisit the problem of the unwanted bouncing associated with our switches. When we introduced our initial switch debounce solution last month (as per the file named CBjuly25-code-01.txt), I wrote, “In an Practical Electronics | July | 2025 XNOR Noise ^ SRCLK from SW 0 1 2 3 4 5 6 7 (a) (b) (c) (d) (e) (f) (g) 26 25 24 23 22 21 20 64 32 16 8 4 2 1 clock state a b c d e f g decimal -1 2 1 2 3 3 4 5 4 5 6 7 6 7 8 8 9 10 9 10 11 12 11 13 12 13 14 15 14 16 15 17 16 : : 125 126 126 127 1 127 2 128 : : 0 1 0 1 0 1 0 1 1 0 0 1 1 0 0 0 1 : 0 0 0 1 : 0 0 1 0 1 0 1 0 1 1 0 0 1 1 0 0 0 : 0 0 0 0 : 0 0 0 1 0 1 0 1 0 1 1 0 0 1 1 0 0 : 0 0 0 0 : 0 0 0 0 1 0 1 0 1 0 1 1 0 0 1 1 0 : 0 0 0 0 : 0 0 0 0 0 1 0 1 0 1 0 1 1 0 0 1 1 : 0 0 0 0 : 0 0 0 0 0 0 1 0 1 0 1 0 1 1 0 0 1 : 1 0 0 0 : 0 0 0 0 0 0 0 1 0 1 0 1 0 1 1 0 0 : 1 1 0 0 : SER Bounce (h) SRCLK to SR RCLK to SR (a) Trigger on first edge 0 64 32 80 40 84 42 85 106 53 26 77 102 51 25 12 70 : 3 1 0 64 : SRCLK from SW SRCLK to SR RCLK to SR (b) Trigger > 6ms after last bounce Fig.13: electrical noise can cause false triggering. To be honest, EMI is probably not something we need to worry about in the case of our current home-based experiments, but it is a significant concern in mission-critical and safety-critical applications such as industrial automation, medical devices, and aerospace. Initial state and all 0s One of the goals of these columns is to Fig.12: the sequence for a 7-bit XNOR LFSR with [0,6] taps. learn and apply ‘best ideal world, starting from the switch practices’, enabling the knowledge being in its inactive state, the Ardui- gained here and now to be effectiveno would detect the leading edge of ly deployed in real-world applicathe activation and cause its output to tions later. the shift register (SR) to respond imIt may be worth reminding ourselves mediately.” that the timing relationships in the This is essentially how we imple- waveforms depicted in our illustramented things, and how we depicted tions, such as Fig. 13, are not to scale. them in Fig.3. However, we also noted For example, we might take a coffee that, “… this approach may not be quite break or go for a long walk between as ideal as we might suppose.” adjacent presses of our SRCLK switch, The first problem with our existing which means the noise could occur solution is that it doesn’t account for seconds, minutes, hours (even days) noise in the form of electromagnetic before the next switch press. interference (EMI). This can originate We’re assuming that our switches from natural sources, such as lightning, can bounce anywhere from 1 to 100 or human-made sources, including times over a period not exceeding 6ms radio transmitters or motors switch- (six milliseconds). ing on and off. Why did I pick 6ms when many When our existing program is wait- textbooks quote only 1ms? Well, seving for the SRCLK switch to be pressed, eral years ago, one of my friends, an it reacts to the first active edge on the acknowledged expert in embedded SRCLK signal. So, consider what would system design, performed extensive happen if noise were present on this tests on a wide variety of switches, signal, as shown in Fig.13(a). finding a maximum bounce time on a Our current code would ‘jump the big old switch from his collection to gun’, as it were. It would be, err, un- be around 6ms. fortunate if someone were using this So, what we’ll do, as illustrated code to control something like a mis- in Fig.13(b), is wait until the signals sile launch! from our switches have been steady Practical Electronics | July | 2025 > 6ms for longer than 6ms following the last bounce before taking any action. Let’s pause here for just a moment. Does anything in the preceding paragraph strike you as odd? We have just stated that we will assume our switch bounce won’t last longer than 6ms. This implies that all we need to do is wait at least 6ms after the initial transition at the beginning of the bouncing sequence (ie, the first transition). Instead, we’re now saying that we’re going to wait for 6ms after the final bounce. Why? Well, if we simply waited for 6ms after the first transition, we could still be fooled by any noise on the signal. Waiting for 6ms after the final bounce ensures that the signal has remained stable in its new state for this amount of time, thereby providing a high degree of confidence that we’ve just experienced a legitimate switching event. How long should we wait? The next consideration is that simply stating “wait for longer than 6ms” is somewhat vague. How much longer? Well, the US Air Force has historically specified a 20ms debounce time after the last bounce for mechanical switches. This value was chosen based on empirical studies of various switch types conducted circa the 1940s and 1950s. The desire was to ensure reliable operation under harsh conditions, such as vibration and mechanical shock. Once adopted by the Air Force, this value became a de facto standard in aerospace and military-grade electronics in the US, and many other military and aerospace standards worldwide have adopted the same rule. 31 In less critical deployments, such as those in industrial and consumer electronics, debounce times can be as low as 5ms or even 1ms, depending on the switch and the application. In the case of embedded systems and microcontroller applications, softwarebased debouncing typically employs a delay of 5–10ms, although some conservative designs still use a 20ms delay. Now, you may be thinking that 20ms is a long time, but everything is relative (even my Auntie Barbara). In the case of an application like ours, where pressing a switch causes one or more LEDs to respond, most people won’t perceive any delay in response of anything less than 50ms. On the other hand, if we are talking about an automated system, such as a robotic assembly line or a pickand-place machine, a 20ms delay between switch activation and response would be far too long, particularly in high-speed applications. There are some cunning techniques we can use to reduce this response time to less than ⅒ of a millisecond, but they are outside the scope of these discussions. Still, perhaps we will discuss them some day, after we've completed the retro gaming system we are working on (in theory, at least)! So, what we are going to do is wait for 16ms following the final bounce. Why 16ms? All will be revealed in our next column. Homework assignment #2 Start thinking about how we can write the code to implement the type of switch debounce illustrated in Fig.13(b) with a delay of 16ms following the final bounce. Note that we’re explicitly saying a delay equal to 16ms, not greater than 16ms and certainly not less than 16ms. Next time I'll leave you with something to think about: how much easier having a microcontroller makes this debouncing logic. In the olden days, they had to do it with discrete components like resistors, capacitors and Schmitt-trigger gates. How times have changed! When next we meet, we will commence by considering the solutions for all the “homework assignments” posed in this column. After that… well, the world is our lobster. Until that happy day, if you have any thoughts that you’d care to share on anything you’ve read here, please feel free to drop me an email at max<at>clivemaxfield.com. And, as PE always, have a good one! 32 I have no idea why everyone calls me "Mad Max"! Useful Bits and Pieces from Our Arduino Bootcamp series Arduino Uno R3 microcontroller module Solderless breadboard 8-inch (20cm) jumper wires (male-to-male) Long-tailed 0.1-inch (2.54mm) pitch header pins LEDs (assorted colours) Resistors (assorted values) Ceramic capacitors (assorted values) 16V 100µF electrolytic capacitors Momentary pushbutton switches Kit of popular SN74LS00 chips 74HC595 8-bit shift registers https://pemag.au/link/ac2g https://amzn.to/3O2L3e8 https://amzn.to/3O4hnxk https://pemag.au/link/ac2h https://amzn.to/3E7VAQE https://amzn.to/3O4RvBt https://pemag.au/link/ac2i https://pemag.au/link/ac2j https://amzn.to/3Tk7Q87 https://pemag.au/link/ac2k https://pemag.au/link/ac1n Other stuff Soldering guide Basic multimeter https://pemag.au/link/ac2d https://pemag.au/link/ac2f Components for Weird & Wonderful Projects, part 1 4-inch (10cm) jumper wires (optional) 8-segment DIP red LED bar graph displays https://pemag.au/link/ac2l https://pemag.au/link/ac2c Components for Weird & Wonderful Projects, part 2 144 tricolour LED strip (required) Pushbuttons (assorted colours) (required) 7-Segment display modules (recommended) 2.1mm panel-mount barrel socket (optional) 2.1mm inline barrel plug (optional) 25-way D-sub panel-mount socket (optional) 25-way D-sub PCB-mount plug* (optional) 15-way D-sub panel-mount socket (optional) 15-way D-sub PCB-mount plug^ (optional) https://pemag.au/link/ac2s https://pemag.au/link/ac2t https://pemag.au/link/ac2u https://pemag.au/link/ac2v https://pemag.au/link/ac2w https://pemag.au/link/ac2x https://pemag.au/link/ac2y https://pemag.au/link/ac2z https://pemag.au/link/ac30 * one required for each game cartridge you build ^ one required for each auxiliary control panel you build Components for Weird & Wonderful Projects, part 3 22 AWG multicore wire kit 20 AWG multicore wire kit https://pemag.au/link/ac3m https://pemag.au/link/ac3n Components for Weird & Wonderful Projects, part 4 5V Buck converter module 9V 2A power supply (optional) Bench power supply (optional) https://pemag.au/link/ac2m https://pemag.au/link/ac46 https://pemag.au/link/ac48 Practical Electronics | July | 2025