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MAX’S COOL BEANS By Max the Magnificent WEIRD & WONDERFUL ARDUINO PROJECTS Part 10: How good are your reactions? I must have blinked A couple of columns ago, we noted 34 To shift register that our latest-and-greatest software what I was told by grizzly old engiswitch debounce code introduced a neers when I was young, naïve, and delay between our activating a switch believed everything I was told. Now and any response (like clocking or I’m older and… well, let’s just stick clearing our shift register). For reawith older. This explains why, in sons we discussed then, we are op- our last column, we decided to test erating under the principle that our things for ourselves. switches may bounce for anything up We left most of our existing setup to six milliseconds (6ms) following as it was. Our only modification to their initial transitions. the hardware was to add one LED The debounce technique we’ve (and its associated current-limiting adopted waits 16ms following the resistor), connected to pin 13 of the final bounce (to ensure that this was Arduino (see Fig.1). Even this was indeed the final bounce) before initi- optional, as the orange LED on the ating any actions. This means that we Arduino is also connected to pin 13. may experience a worst-case delay of For the software, we took bits and 6ms + 16ms = 22ms between activat- pieces from earlier programs and ing one of our switches and seeing munged them together to create our the results. New Up Down Trig Having any sort of delay bothers me. However, as I mentioned at the 0V time, this delay is so slight as to be imperceptible. I also stated that, as k a ‘rule of thumb’, we should aim to keep any switch-toa action delays under 50ms. Of course, this is in the context of human-activated switch events. Things are different when we are talking about switches controlled by (and controlling) machines, like robotic arms on an automated asArduino DIGITAL IN/OUT (PWM ~) sembly lines, but that’s a whole other Orange LED Green LED kettle of parrots. The reason I used 50ms is that this is Fig.1: the breadboard configuration of our perception tester. AREF GND 13 12 ~11 ~10 ~9 8 7 ~6 ~5 4 ~3 2 TX-1 RX-0 A "stream of consciousness" is when someone writes in a way that directly mimics the way they think, tangents and all. It's basically an unfiltered 'brain dump' onto paper. What’s that, you say? You’d like to see an example? Well, this is your lucky day… As I may have mentioned on occasion, six is my lucky number. I know this because my mum told me so when I was six years old. Talking about air conditioners (we weren’t, but we are now), as I pen these words, the heat index outside is 106°F (~41°C). This shows how lucky I am, because it could have been 107°F. We didn’t have air conditioners when I grew up in England. It took us thousands of years to learn how to heat our houses; the thought of trying to cool them down never occurred to us. But I now live in America. Fortunately, we have air conditioners. Unfortunately, when I say “we”, I fear that this is not in the inclusive sense, because our air conditioner is no longer with us. Much like the Norwegian Blue in Monty Python’s Dead Parrot sketch, we are now the proud possessors of an ex-air-conditioner. Thus, the “outside” qualifier I used earlier was superfluous because conditions are much the same inside. The humidity is 85% (you see, lucky again, it could have been 86%). I’m hot. I’m sticky. And I’m sweaty (and not in a good way). Also, I’ve fallen behind, and I must write this column before our illustrious editor turns his fearsome, allseeing eye in my direction. But it’s not all about me (it should be, but it’s not); how’s your day going? Practical Electronics | October | 2025 new perception tester program. You can refresh your memory by downloading this program in the file named CB-oct25-code-01.txt. As usual, all files mentioned in this column are available as part of the October 2025 download package from the PE website at https://pemag.au/link/ac7y We still use signals from the Arduino (pins 5, 6, and 7) to control the shift register, but only to clear it because we don’t want to leave its inputs floating around and have it displaying annoying random values. The most significant change is in how we handle the signals from the switches to the Arduino (pins 2, 3, and 4). In our program, we set the initial lag (delay) between the switch of interest being pressed or released and the LED changing to 50ms. We use our left-hand switch to perform the role of ‘up’, ie, to increase the lag in 5ms steps. We use the middle switch to perform the role of ‘down’, to decrease the lag in 5ms steps. Whenever we make any such change, we display the current lag value on our host computer’s screen using the Arduino’s Serial Monitor function. Last but not least, we use our righthand button as a trigger to initiate actions. Pressing or releasing this button causes the LED to switch on or off (after the current lag), respectively. Once again, all this was discussed in excruciating detail in our last column. The interesting part was that before performing this experiment, I honestly believed I’d be able to perceive a 50ms lag, but such was not the case. I was surprised to discover that I can barely discern delays between 150 and 200ms! Is this because I’m ageing like a fine cheese? Did I blink? Or is there more to this than meets the eye (no pun intended)? More than meets the eye I was puzzled (which is my natural state), so I decided to conduct some research, by which I mean I asked ChatGPT (I do my best to cross-check everything it tells me, just in case it’s having a virtual ‘bad hair day’). It turns out that there’s a meaningful difference between a user performing this sort of action occasionally versus repeatedly. In the case of occasional use (single press), which is essentially what we’re doing, albeit more than once, the user is more likely to overlook short delays. Since the user isn’t in a rhythm, their brain doesn’t establish a strong baseline for timing comparison. As a result, delays under Practical Electronics | October | 2025 about 200ms may Family Logic Technology / Type Introduced seem instantaneous or just ‘natural lag’, 74 Standard TTL 1964 especially if there’s 74H High-speed TTL ~1966-1967 no reference point. By comparison, 74L Low-power TTL ~1968 in the case of repet74S Schottky TTL ~1971-1972 itive action (rhythmic pressing), our 74LS Low-power Schottky TTL ~1975-1976 temporal sensitivity increases. The brain 74AS Advanced Schottky TTL ~1982 adapts and antici~1983 74ALS Advanced Low-power Schottky TTL pates the response pattern, so any in74F Fast TTL ~1985 consistency or delay becomes more no74C Standard CMOS ~1978 ticeable. Even small 74HC High-speed CMOS ~1982-1983 lags (like 50ms) start to feel ‘off’, because 74HCT High-speed CMOS, TTL-compatible ~1983-1984 the user begins to 74AC Advanced CMOS ~1985-1986 internally track the expected timing. 74ACT Advanced CMOS, TTL-compatible ~1985-1986 As a result, with a 50ms lag, the LED Fig.2: the main 74xx-series logic IC families. may feel slightly sluggish, while at 200ms, it may Oh, William, why doth thou vex feel significantly delayed, possibly me so? Unfortunately, William is corfrustratingly so when it comes to rect to raise his querulous concern, rhythmic tasks like tapping to music. because there are indeed potential problems. Mea culpa The approximate chronological Before we proceed, I’m afraid I order of introduction for the main may have misled you a little. In these 74xx00 subfamilies (both TTL and Weird and Wonderful columns, we’re CMOS) is illustrated in Fig.2. TTL reusing many of the components that stands for transistor-transistor logic, we acquired as part of our Arduino which utilises bipolar junction tranBootcamp series. sistors (BJTs). As you may recall, we’ve been using Meanwhile, CMOS stands for comthe 74xx series of integrated circuits plementary metal-oxide-semiconduc(ICs) for our experiments. This is an tor, which employs complementary extensive family with numerous sub- pairs of metal-oxide-semiconductor families, each offering different char- field-effect transistors (Mosfets). As acteristics, such as speed and power they were introduced, the newer famiconsumption. lies didn’t displace existing families. We began by purchasing a kit of All the subfamilies ultimately coexpopular 74LS chips (https://pemag. isted alongside each other, which was au/link/ac2k). We opted for LS (low- both a blessing and a curse. power Schottky) parts because this Each family provides different was the dominant subfamily during trade-offs between speed and power the late 1970s and 1980s. consumption. Furthermore, each Since they were produced in bulk family uses different transistor techand are now somewhat outdated for nologies, and each has its own input modern commercial designs, LS parts current requirements and output drive are often available at a very low cost, capabilities. making them attractive for hobbyists, The question before us is which educators, and retro-computing fans. outputs can be used to drive which Later, we added some 74xx595 8-bit inputs. This is one of the classic 74xxshift registers. Since it’s harder to series rabbit holes, and it’s very easy track down LS versions of these little to get confused. rascals, we opted for HC (high-speed There are so many combinations CMOS) parts (https://pemag.au/link/ of outputs and inputs that even ac1n). This is where the (potential) professional logic designers lose problem lies. track. I received an email from a reader What we essentially need is a we shall call William (because that’s driver/receiver compatibility matrix his name), who asked, “Are there depicting which 74xx-series logic any issues using the 74LS logic gate families can reliably drive the inputs outputs to drive the 74HC shift reg- of other 74xx00-series logic families. ister inputs?” Assuming we are powering all the 35 Inputs 74 H L S LS AS ALS F C HC HCT AC 74 H L S Outputs LS AS ALS F C HC HCT AC ACT Compatible Marginally compatible Not reliably compatible ACT we see the LED light up, we press the button, and the Arduino displays the time it took for us to respond on our host computer. There are many possibilities here. For example, we could use one of our buttons to inform the program running on the Arduino when we’re ready to start, and another button to respond to the LED switching on. For no other reason than to demonstrate an alternative approach, I’ve decided to use a single button, which we’ll call Test. We won’t remove the other switches in case we need them later, but we’ll pretend they don’t exist (see Fig.4). Reaction tester software We won’t go through every aspect of this program here (you can download a copy in the file named CB-oct25-code-02.txt). Most of our definitions remain the same as those for our perception tester, and any new definitions are readily apparent from the context. Similarly, the setup() function remains largely unchanged, except we are now working with only one pushbutton switch. All we do is initialise the serial communications between our Arduino and host computer, specify which of the Arduino’s pins we are using as inputs and outputs, set the outputs to their inactive levels, and clear the shift register on our breadboard. However, it’s probably worth our time to take a quick skim through the loop() function, as illustrated in Listing 2(a). We are using the convention that the listing number (2 in this case) corresponds to the numerical part of the matching code file name (“02” here). On lines 72 through 75, we declare a regular integer (two-byte) and three long integer (four-byte) variables. On line 78, we check to see if the user has pressed the Test button. If not, we shrug our metaphorical shoulders, exit the function, then repeat the process. When the user finally presses the button, on line 81, we switch the LED on. On line 84, we wait for the switch to stop bouncing. On line 87, we wait for the user to release the button. On line 92, we switch the LED off. Fig.3: the 74xx-series logic IC compatibility matrix (this assumes that everything is running at 5V). devices at 5V, a matrix of this type is shown in Fig.3. In some cases, the different families are logic-level compatible but not drive-strength compatible. For example, each family can typically drive 10 or more loads (devices) in the same family, but this may fall to only 1 or 2 loads when driving other families. Suffice it to say that, although in practice we can use LS outputs to drive HC inputs (that’s what we’ve been doing without any difficulties), this is not a reliably compatible combination. It isn’t recommended, and professional engineers wouldn’t do so in real-world products. I just had a chat with a friend about this. He has drawers of 74xx-series ICs in his workshop that he’s scavenged, salvaged and reclaimed over the years. He started by saying that when he’s throwing a quick prototype together, he typically just looks for the correct chip type number and doesn’t concern himself with the family. During our conversation, however, he started to remember some projects that he had never been able to get working for reasons he couldn’t determine, and he ended up saying, “I wonder if I was experiencing compatibility issues as depicted in your matrix.” The simplest and safest approach is to pick a single technology and stick to it. Thus, if we were starting from scratch, I’d recommend going 36 with a kit of 74HC parts that contains all the devices we’ve been using in our experiments: that is, the 04 (hex inverter), the 08 (quad two-input AND), the 86 (quad two-input XOR) and the 595 (8-bit serial in, parallel out shift register). In fact, I found just such a kit on the Temu website (https://pemag.au/ link/ac7z). If you want to dive deeper into all of this, a few years ago, my friend Elizabeth Simon wrote a series of How to Read Data Sheets columns (https://pemag.au/link/ac80). These cover a wide range of components, including regulators, diodes, transistors, multivibrators, relays, and, of course, logic gates and registers. Reaction tester hardware Returning to last month’s column, having surprised myself by my lack of ability to detect a lag of less than 150~200ms between my pressing a button and observing a corresponding change in the state of an LED, I posed another problem in the form of a homework assignment for you. As you may recall, I invited you to create a complementary Reaction Tester experiment using the orange LED on the Arduino (and the optional LED on our breadboard) along with one or more of our pushbutton switches. The idea is for the Arduino to wait some random amount of time before illuminating the LED(s). As soon as Practical Electronics | October | 2025 New Test Unused 0V To shift register k AREF GND 13 12 ~11 ~10 ~9 8 7 ~6 ~5 4 ~3 2 TX-1 RX-0 a DIGITAL IN/OUT (PWM ~) Orange LED Arduino Green LED On lines 95 and 96, the program pauses for a random delay, which we’ve currently set to be between 5 and 10 seconds. After this delay, on line 99, we switch the LED on to indicate to the user that we’re ready to proceed. This is where things start to get interesting. The Arduino’s built-in millis() function returns the number of milliseconds since the program started running. On line 102, we use this function to load the current time into our startTime variable. On line 103, we wait for the user to react to the LED lighting by pressing the button. As soon as the user presses the button, on line 106, we record the new current time into our endTime variable. On line 109, we pause to ensure the switch has stopped bouncing (this isn’t really necessary, but ‘better safe than sorry’). On line 117, we switch the LED off again. On line 120, we calculate the time it took the user to respond and store this in our elapsedTime variable. Finally, on lines 121 through 123, we display the result on the screen. The best I achieved was around 250ms (¼ of a second). I wonder how I would have fared in my younger years. If I get my time machine working… Before we boogie It just struck me that we’ve been merrily using logic gates without noting some important portions of their backstory, so let’s briefly summarise things now. Practical Electronics | October | 2025 Fig.4: the breadboard layout for our reaction tester. Listing 2(a): the main loop of the reaction tester code. 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 void loop () { unsigned int readySteadyGo; unsigned long startTime; unsigned long endTime; unsigned long elapsedTime; // Wait for user to start (test button press) if ( digitalRead(PinTest) == TEST_ACTIVE) { // Turn LED on digitalWrite(PinToLed, LED_ACTIVE); // Wait for switch to stop bouncing delay(JUST_A_BIT); // Wait for user to release test button while ( digitalRead(PinTest) == TEST_ACTIVE) { } // Turn LED off digitalWrite(PinToLed, LED_INACTIVE); // Pause for some random delay readySteadyGo = random(MIN_GO_DELAY, MAX_GO_DELAY); delay(readySteadyGo); // Turn LED on digitalWrite(PinToLed, LED_ACTIVE); // Time how long it takes to press test button startTime = millis(); while ( digitalRead(PinTest) == TEST_INACTIVE) { } endTime = millis(); // Wait for switch to stop bouncing delay(JUST_A_BIT); // Wait for user to release test button while ( digitalRead(PinTest) == TEST_ACTIVE) { } // Turn LED off digitalWrite(PinToLed, LED_INACTIVE); // Calculate and display the result elapsedTime = endTime - startTime; Serial.print("You took "); Serial.print(elapsedTime); Serial.println(" ms"); } } Around the 1850s, British mathematician George Boole developed a new form of mathematics, which eventually became known as Boolean algebra. Boole’s intention was to use mathematical techniques to represent and rigorously test logical and philosophical arguments. He came up with the concepts of negation, conjunction and disjunction, which we (by which I mean electronic and computer buffs) think of as NOT, AND and OR, respectively. Sadly, Boole’s work found little application outside the school of symbolic logic until the late 1930s, when, as I wrote in my book, Bebop to the Boolean Boogie: …a graduate student at MIT, Claude Elwood Shannon, submitted a master’s thesis that revolutionized elec- tronics. In this thesis, Shannon showed that Boolean algebra offered an ideal technique for representing the logical operations of digital systems. Shannon had realized that the Boolean concepts of False and True could be mapped onto the binary digits 0 and 1, and that both could be easily implemented by means of electronic circuits. Logical functions can be represented using graphical symbols, equations or truth tables, and these views can be used interchangeably. Different people use different symbols. We’ve been using &, |, and ^ characters to represent AND, OR and XOR, because this matches the C/C++ programming language convention (which was copied by many other programming languages). 37 y=a&b y=a|b AND a y & b ≡ a a b OR a|b | b y a b y a b a b a|b y 0 0 1 1 0 1 0 1 0 0 0 1 0 0 1 1 0 1 0 1 1 1 0 0 1 0 1 0 1 1 1 0 0 0 0 1 (a) AND-to-OR y=a|b y=a&b OR a y | b ≡ a a b AND a&b & b y a b y a b a b a&b y 0 0 1 1 0 1 0 1 0 1 1 1 0 0 1 1 0 1 0 1 1 1 0 0 1 0 1 0 1 0 0 0 0 1 1 1 (b) OR-to-AND Fig.5: some of the most important DeMorgan transformations. It’s also common to use the ! character to represent NOT (also a C/ C++ convention). However, another popular alternative is to use overbars (horizontal lines placed over a character or group of characters) to indicate negation (similar to how we’ve been using over-bars to indicate active-low signals, which are, in a sense, a negated form of logic). Feeling transformed Another British mathematician, Augustus DeMorgan, who was a contem- 38 porary of Boole’s, came up with a set of rules called DeMorgan transformations. These have all sorts of uses. For our purposes here, we need to note only that they can be used to transform AND operations into ORs and vice versa. Let’s start by transforming an AND into an OR, illustrated in Fig.5(a). Consider this in the form of the equation y = a & b. We commence by inverting the inputs a and b to give a and b. Next, we replace the & with an | to give a | b. Finally, we invert the entire function to give y = a | b. I've no idea Now, consider why they implementing the call me same functional"Max Max"! ity following the same sequence using logic gates. In this case, we start by inverting the inputs using NOT gates. Next, we swap the AND gate for an OR gate. Finally, we invert the output from the whole function by attaching a NOT to the output from the OR gate. If you examine the truth tables for the initial AND operation, along with its DeMorgan counterpart, as depicted in Fig.5(a), you’ll see that this works a treat. We can use a similar approach to transform an OR into an AND, as illustrated in Fig.5(b). Now, your initial reaction might be that this is horrendously complicated, but it’s really not as bad as it seems. In the case of the AND-to-OR shown in Fig.5(a), for example, at first glance it looks like we’ve transformed a single level of logic (the AND) into three levels of logic (the NOTs on the inputs, the OR, and the NOT on the output). Does this mean that our new OR will switch slower than our AND? Well, let’s think about this a bit. In last month’s column, we noted that, ‘under the bonnet’, an AND is actually formed from a NAND followed by a NOT, which we could write as NAND → NOT, which means our AND already contains two levels of logic. In the case of our transformed function, we could think of this as NOT → OR → NOT. In reality, however, our OR is actually formed from a NOR followed by a NOT, which means our transformed function is actually NOT → NOR → NOT → NOT, which is four levels of logic (eek). But, from last month’s column, we also know that two NOTs in series (ie, NOT → NOT) perform the same job as not having any NOTs at all, which means we can remove the two NOTs from the output of the NOR. All this boils down to the fact that we’ve changed a NAND → NOT path into a NOT → NOR equivalent, both of which have two levels of logic. There’s more to it, but I think this is enough to keep us cogitating for a while. Why am I waffling on about all this? Well, I’m a digital logic designer by trade. We used to do this sort of thing by hand all the time in the days of yore when I was bright-eyed and bushy-tailed. These days, when developing new digital integrated circuits, logic designers have advanced tools that do all the heavy lifting for them; however, it’s still helpful to know how to do this when creating breadboard prototypes and working with a limited supply of logic gate options. The way I think about this is that, when solving mathematical problems, it’s great to have a calculator, but it’s also handy to know how to Practical Electronics | October | 2025 perform the calculations by hand in case our batteries die. The same thing applies to logic. It’s great to have clever tools, but it’s also satisfying to understand how they work their magic. Would you like to see a DeMorgan transformation being employed to solve a real-world problem? I was sure you would say yes! DeMorgan in action XOR Fig.6: creating an XNOR gate from XOR and NOT gates. NOT XNOR ≡ ^ ^ +5V Fig.7: creating an XNOR gate from two XOR gates. XOR XOR XNOR ^ In our July 2025 Cool Beans column, ^ ≡ ^ we introduced the concept of linear feedback shift registers (LFSRs) as a method of generating pseudorandom numbers (not truly random numbers, lows. We start by drawing the XOR The only problem is that we don’t symbol and its corresponding truth have an OR gate. Well, that’s what but close enough for many jobs). As part of this, we decided that table. we’re telling ourselves. In fact, we do From the truth table, we identify have quad two-input OR, NAND, and we needed a two-input XNOR gate. The problem was that we only had the rows for which the output is 1. NOR gates in our kit of parts (74xx32, In natural language, from the a quad two-input XOR gate in our 74xx00, and 74xx02, respectively), second row, we can state that the y but we are pretending that we have kit of parts. Our initial solution was to invert output is 1 if the a input is 0 AND only AND and NOT gates for the purthe output of our XOR with a NOT the b input is 1. From the third row, pose of this exercise. gate to provide the required XNOR we can state that the y output is 1 if Happily, we now know that we the a input is 1 AND the b input is 0. can use a DeMorgan transformation functionality (see Fig.6). We can combine these to realise to replace the OR gate shown in Fig.8 Also in that issue, I posed two homework tasks. The first was to that the y output is 1 if the a input with the AND and three NOT gates suppose we had only our 74xx86 is 0 AND the b input is 1, OR if the shown in Fig.5(b). chip containing its four two-input a input is 1 AND the b input is 0. Last, but certainly not least, since We can represent this sentiment as we now have an XOR but we really XOR gates (so, no 74xx04 with its six NOT gates and no 74xx08 with its a Boolean equation, or as a combina- want an XNOR, all we need to do four two-input AND gates). Your job tion of logic gates. is remove the NOT gate driving the As an aside, due to the similarities output. I feel a little “tra-la” is in was to implement an XNOR function using only XOR gates. Last month, between arithmetic and logical oper- order. we presented one possible solution, ators, the Boolean & (AND) operator is known as a logical multiplication, How about one more? depicted in Fig.7. As we’ve discussed, we began by or product, while the Boolean | (OR) The second homework task was to suppose we had only our 74xx04 with operator is known as a logical addi- creating an XNOR by inverting the output from an XOR with a NOT, and its six NOT gates and our 74xx08 with tion or sum. Thus, the equation y = (a & b) | (a & b) this approach has guided all our subits four two-input AND gates (so, no 74xx86 with its four two-input XOR would be said to be in a sum-of- sequent implementations. Based on gates), and to implement the desired products (SOP) form. There’s also a our newfound knowledge, suppose product-of-sums (POS) counterpart we decide to come at things from two-input XNOR function using only form, but we’ll leave that for another a different angle; that is, starting AND and NOT gates with the truth table for our desired Once again, we presented one pos- day. sible solution last month. We started by implementy = (a & b) | (a & b) AND ing an XOR using four a NAND gates, which were (a & b) themselves implementOR XOR & ed as ANDs followed by a NOTs, and then we transy y | formed this XOR into an ^ b AND XNOR by removing the NOT from the final output (a & b) signal. & b Now that we are familiar with DeMorgan transformations, we can a b a b a&b a&b y y devise other methods to create our XNOR. In line 0 0 0 0 0 0 0 0 a&b with our earlier solutions, 0 1 1 0 1 0 1 1 let’s start by implementing 1 0 1 1 0 1 0 1 an XOR, as illustrated in a&b Fig.8. 1 1 0 1 1 0 0 0 The approach we might take to do this is as fol- Fig.8: creating an XOR gate from two NOT gates, two AND gates and an OR gate. ≡ Practical Electronics | October | 2025 39 XNOR function, as illustrated in Fig.9. Once again, we can use a DeMorgan transformation to replace the OR gate shown in Fig.9 with the AND and three NOT gates shown in Fig.5(b). In this case, however, we don’t need to subsequently remove the final NOT, because we already have the XNOR function we crave. y = (a & b) | (a & b) AND XNOR & a ≡a a b y 0 0 1 1 0 1 0 1 1 0 0 1 OR (a & b) & a&b a&b a b 0 0 1 1 0 1 0 1 y | AND b Universal gates As a point of interest, two-input NAND gates and two-input NOR gates are known as “universal gates” because you can use either of them to create any of the other logic gate types. In the case of the NAND, for example, we can form a NOT by tying the two inputs of a NAND together, as illustrated in Fig.10. We already know that we can form an AND by inverting the output of a NAND with a NOT. Now we know that we can form an AND using two NANDs. Similarly, we can transform an AND into an OR, and… so it goes. In fact, any combinational logic circuit, no matter how complex, can be represented as a network of NAND (or NOR) gates. Logic synthesis tools for designing digital ASICs (application-specific integrated circuits) often perform such transformations internally for optimisation and mapping! y ^ b (a & b) a&b a&b 1 0 0 0 y 0 0 0 1 1 0 0 1 Fig.9: creating an XNOR gate using two NOT gates, two AND gates and an OR gate. Next time I can’t believe it. I’ve allowed you to sidetrack me once again (shame on you!). But I won’t let you divert me anymore. In our next column, we will defi nitely return to building our retro games console, wiring up the 7-segment displays and the eight push-button switches on the front panel, or my name’s not Max the Magnificent. As always, if you have any thoughts you’d care to share on anything you’ve read here, please feel free to email me PE at max<at>clivemaxfield.com. NAND a NAND y & b a NOT y & ≡ y a a b y a y 0 0 1 1 0 1 0 1 1 1 1 0 0 1 1 0 Fig.10: using a NAND gate to form a NOT gate. Devices and components used in this issue Arduino Uno R3 microcontroller module Solderless breadboard 4-inch (10cm) jumper wires (optional) 8-inch (20cm) jumper wires (male-to-male) LEDs (assorted colours) Resistors (assorted values) Ceramic capacitors (assorted values) 16V 100µF electrolytic capacitors Momentary pushbutton switches 8-Segment DIP red LED bar displays Kit of popular SN74LSxx chips* 74HC595 8-bit shift registers* Kit of popular SN74HCxx chips** https://pemag.au/link/ac2g https://amzn.to/3O2L3e8 https://pemag.au/link/ac2l https://amzn.to/3O4hnxk https://amzn.to/3E7VAQE https://amzn.to/3O4RvBt https://pemag.au/link/ac2i https://pemag.au/link/ac2j https://amzn.to/3Tk7Q87 https://pemag.au/link/ac2c https://pemag.au/link/ac2k https://pemag.au/link/ac1n https://pemag.au/link/ac7z ** This kit provides all the ICs we need, instead of the two * entries. 1591 ABS flame-retardant enclosures Learn more: hammondmfg.com/1591 uksales<at>hammfg.com • 01256 812812 40 Practical Electronics | October | 2025