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Welcome to the sensorium Techno Talk From breadcrumb-sized accelerometers to microwatt neural nets and backscattered wireless links, ultra-low-power technologies are turning everyday objects into intelligent, connected companions. I read a lot of science fiction. Some of these stories go in one ear and out the other, while others are a little ‘stickier’. One that keeps floating back to the top of (what I laughingly call) my mind is The Last Human by Zack Jordan (https://pemag.au/ link/ac9s). One facet of this far-future tale is that every citizen has a brain implant that connects them to “The Network,” a super-AI-based information and governance layer that links everyone and everything together. These implants host their own local, personal companion AIs—digital confidantes that converse with their users and act as tireless assistants. They help you remember things, schedule tasks, filter incoming messages, look up information and perform all sorts of other useful duties. But wait, there’s more. In this universe, just about everything—doors, light switches, toilets, rubbish chutes, ventilation controllers, safety monitors, and goodness only knows what else— is kitted out with its own AI-enabled sensors. All of these are wirelessly connected to “The Network”, and hence to each other… and to you. This may sound a bit dystopian at first blush, but it’s not all gloom and doom. Also, if you’re worried about ubiquitous AI-infused fixtures, I don’t know what you’ll make of the gigantic, highly intelligent, killer spider creatures. Still, they belong to a different part of the tale. Obviously, we’re still a long way from this hypothetical future, but we’re certainly starting to dip our toes into the sensorium waters. For example… CMOS MEMS sensors When I was young, sensors were big, bulky and horrendously expensive. Take accelerometers, for example. These were serious pieces of hardware in the domain of ‘cost is no object’ applications like airplanes, missiles and rockets. Fast forward to today’s micro-electro­ mechanical systems (MEMS), in which microfabrication processes—similar to those used for integrated circuits—are employed to create tiny mechanical 60 Max the Magnificent structures and sensors on a silicon substrate. A MEMS accelerometer, for example, involves creating a microscopic cantilever that’s anchored at one end and free to bend at the other. There’s a gap between the free end and a fixed electrode. The cantilever, gap, and fixed electrode form a tiny capacitor. Under acceleration, the free end of the cantilever deflects ever so slightly, thereby changing the capacitance. By measuring this change, we can determine the acceleration causing it. The result is that an accelerometer, which used to be the size of a shoebox and consume watts of power, is now smaller than a breadcrumb, consumes only milliwatts, and is cheap enough to appear in everything from smartphones and smartwatches to cat toys. You may think that MEMS sensors are ‘as good as it ‘gets’, but as the ancient Greek philosopher Heraclitus famously noted, “the only constant in life is change”. I recently got to chat with Dr Josep Montanyà, one of the founders of Nanusens (www. nanusens.com). Headquartered in Edinburgh, this company’s claim to fame is that it can create MEMSlike sensors using the same standard CMOS technology we use to build silicon chips. The difference between these sensors and traditional MEMS sensors is that they are a thousand times smaller and consume only microwatts of power, while offering higher sensitivity, higher bandwidth, higher yield, higher reliability, and lower cost. What’s not to love? the case. Neurophysiologist Warren McCulloch and logician Walter Pitts proposed a mathematical model of a neuron as far back as 1943. The first physical electronic implementation of an artificial neural network was the SNARC (stochastic neural analog reinforcement computer), which was built in 1951 by Marvin Minsky and Dean Edmonds. The first practical, trainable electronic neural network was the Perceptron, which was developed by Frank Rosenblatt in 1958. Today’s ANNs can be implemented using digital or analog, synchronous or asynchronous, and spiking or non-spiking technologies. Although the vast majority of ANNs are digital, synchronous and non-spiking, other technologies are finding niche applications. For example, I had a nice chat with Aleksandr Timofeev, the CEO of POLYN Technology (https://polyn.ai/). This company, which is headquartered in Bristol, has developed an asynchronous analog ANN based on its NASP (neuromorphic analog signal processing) technology. They can take an existing, trained ANN defined in TensorFlow or Py­ Torch and automatically convert it into an ultra-low-power analog realisation for implementation in silicon as part of a larger device. For example, a neural network that can detect a human voice requires only around 500 neurons. When implemented in NASP, this neural net consumes only microwatts of power. Colour me impressed! Analog neuromorphic processors In my previous column, I mentioned a company called HaiLa (www.haila. io). Their claim to fame is the ability to convey sensor information over Bluetooth or Wi-Fi while using only a fraction of the power. “How big a fraction?” I hear you cry. You are wise beyond your years. You obviously know that even 99/100 is a valid fraction in the mathematical sense. This prompts me to ask if you’ve read How to Lie with Statistics by Darrell Huff (www.amazon.co.uk/ dp/0140136290), but we digress… Today’s artificial intelligence systems are modelled on the functioning of biological brains. Layers of “neurons” are connected to form artificial neural networks (ANNs). Each of these neurons receives and integrates signals from multiple ‘upstream’ neurons. If the total activity exceeds a specified threshold, the neuron ‘fires’ by sending a signal to multiple ‘downstream’ neurons. It’s tempting to think of all this as being radically new, but such is not Working wireless magic Practical Electronics | February | 2026 HaiLa passive backscattering on Wi-Fi. Sustained Bluetooth transmissions typically draw around 10–50 mW, while sustained Wi-Fi transmissions can draw 0.2–1.0 W. By comparison, HaiLa can transmit data while consuming only 10 microwatts. That is low enough that you could run a sensor for 15 to 20 years on a single CR2032 coin cell! How is this magic achieved? HaiLa’s chip doesn’t actually transmit information, per se. It uses bistatic passive backscattering to ‘reflect’ packets as they pass from an external transmitter to a receiver, modulating them as they whiz by. Since the reflected signal is extremely weak, HaiLa’s chip employs a clever 50MHz channel shift to move the backscattered frame away from the original downlink channel. This provides sufficient adjacent-­channel rejection to allow the receiver to PowerLattice’s tiny power delivery chiplet. detect the reflected signal as distinct from the original. Meanwhile, at the data centre ‘XPU’ refers to any high-end AI processing unit, such as a CPU, GPU, NPU, TPU, FPGA or a custom AI ASIC (application-­specific integrated circuit). These beasts can easily consume 1kW. If we assume a core voltage of 1V (which is high), we are talking about 1000A flowing through the accelerator card carrying the XPU! As transistor counts rise and core voltages fall, pundits are predicting that data centre accelerator cards will carry up to 3000A in the notso-distant future. A typical accelerator card has the XPU in the centre of the board. The XPU actually consumes only around 25% of the board’s real estate. The rest of the board is devoted to powering it via numerous DC-DC converters. Each of these converters has an associated inductor. The bottom of the board under the XPU is packed with hundreds of capacitors. This scenario, which is known as horizontal power delivery, has many problems. For example, the power dissipated in the board’s traces increases quadratically with current. Also, because the DC-DC converters are so far from the XPU, they struggle to respond to voltage fluctuations caused by current surges from billions of transistors switching simultaneously. 16 power delivery chiplets as part of an XPU package. Source: PowerLattice. I recently found myself chatting with Dr. Peng Zou, who is the CEO and President of PowerLattice (www. powerlatticeinc.com). PowerLattice is attempting to address these problems and has just emerged from stealth mode with a solution. The folks at PowerLattice have created a tiny power delivery chiplet so small and thin (a few hundred micrometres thick) that arrays of them can be built into the same package as the XPU. Each of these power delivery chiplets can handle 200A sustained and 250A peak (which blows my socks off). In addition to control and power logic, they include all necessary capacitors and inductors, with everything fabricated into a single monolithic package. This means that the remaining 75% of the board is now free. Also, an accelerator card using this vertical power delivery technology consumes only 50% of the power of a card using traditional horizontal power delivery, which will make data centre operators (especially the people responsible for power delivery and cooling) very happy indeed. Wakey wakey An H100 accelerator card, covered in power delivery components. Source: Nvidia. Practical Electronics | February | 2026 We may not have brain implants, personal companion AIs, or polite, sentient toilets just yet, but I think we’re headed that way. Sensors are shrinking, wireless links are sipping power, and intelligence is migrating to the very edge of reality. It may not be long before everything around us starts to wake up. I’m not sure whether that prospect should leave us thrilled or terrified. PE Perhaps both! 61