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By Andrew Levido Power Electronics Part 5: power factor correction & EMI filtering In last month’s article, we mentioned the importance of power factor for an efficient electrical grid. This time, we will look at some active techniques that can help in this regard. We will also cover EMI filtering, which is related in the sense that it is also concerned with the mitigation of unwanted current harmonics. E lectromagnetic interference (EMI) is a general term for any disturbance caused by an electromagnetic field that negatively impacts the performance of electrical or electronic equipment. EMI can be radiated through space or conducted from one device to another through signal or power cables. While you can (and should) take steps to make sure your designs are not susceptible to EMI produced by other devices, your main focus should be on making sure your designs are not producing unacceptable levels of EMI that could affect other equipment. EMI standards such as EN55032 require radiated emissions in the 30MHz to 1GHz range to be below certain field strength thresholds when tested with a standard antenna at a distance of 10m. Mitigating radiated EMI requires close attention to shielding of enclosures, grounding, minimising conductor loop areas, optimising PCB layout, the use of ground planes and controlling the slew rate of signals. Conducted EMI We will focus on conducted EMI, specifically signals that are conducted back into the power source by switching converters. The standards are generally concerned with frequencies in the 150kHz to 30MHz range, and require the level of signals within to fall below specified thresholds over different parts of the band, typically measured using a spectrum analyser. To give you an idea of what is required, conducted EMI for a Class A device must be below 79dBµV from 150kHz to 500kHz and below 73dBµV from 500kHz to 30MHz when measured with a ‘quasi-peak’ detector. The dBµV units describe the amplitude of the conducted emissions with respect to a 1µV reference. 79dBµV is therefore about 9mV RMS and 73dBµV is about 4.5mV RMS. Requirements for Class B devices are considerably lower. EMI is usually managed by the addition of filters on the lines. The switching frequency of many modern converters is higher than 150kHz, so the converter’s input filter plays a critical role in meeting conducted EMI specifications. Fig.1 shows a standard buck converter with a simple capacitive input filter Cf and with source impedance Zs. Our task is to analyse this filter and ensure that the voltage amplitude of the switching-frequency ripple (and its harmonics) is below the required threshold. So far in this series, we have used average value analysis to understand the converter’s periodic steady-state (PSS) operation and complex frequency analysis to determine the converter’s dynamic performance. Neither of these will help us now, so we will revert to good old AC time-domain analysis. This is a technique which, as its name suggests, ignores the DC component of the signal and focuses on the AC component. For example, the PSS model shows us that the input current (ix) of the converter in Fig.1 has a rectangular shape with a duty cycle D and an amplitude of Il as shown in the upper chart there. If we remove the DC component of the input current, we get the alternative picture shown in the lower chart. I have shown the current here with a duty cycle of 0.5, which gives the highest AC RMS current. If the duty cycle moves away from 0.5 in either direction, the RMS current decreases, Fig.1: the AC time-domain analysis equivalent circuit of this buck converter replaces everything to the right of the input filter capacitor with an AC current source. 40 Silicon Chip Australia's electronics magazine siliconchip.com.au reaching zero at the extremes when D = 0 or D = 1. This is a common approximation because we usually want to design EMI filters for the worst-case situation. It is also easiest to calculate the harmonics of the AC waveform if it is a true square wave. The lower circuit in Fig.1 shows the AC analysis model of the buck converter. Everything to the right of the input filter capacitor is replaced with an AC current source ix(ac), and the DC voltage source is eliminated altogether. In this case, the current source will be a variable duty cycle rectangular wave with a peak-to-peak amplitude of Il. We will use this model to design a suitable input filter in a moment. First, we should think about how we are going to measure the conducted EMI in this circuit. The voltage that our spectrum analyser would see, vs(ac), is obviously highly dependent on the source impedance, Zs. We can assume this is quite low at DC, but who knows what it will look like over the 150kHz to 30MHz band of interest. Fig.2: to measure conducted EMI consistently, we need to use a line impedance stabilisation network (LISN) like this. The component values are provided in the relevant EMI standard. The LISN To make meaningful and repeatable EMI measurements, we have to specify a standard source impedance at the frequency of interest. For this reason we use a line impedance stabilisation network (LISN) when making conducted EMI measurements. LISNs are used with both DC and AC sources. Fig.2 shows the AC model connected to a voltage source with impedance Zs via a LISN inside the dotted box. I have reinstated the source voltage to indicate that the converter is powered through the LISN, which has a low impedance at DC or mains frequency but presents a load of 50W to the converter input at the frequencies of interest. The LISN’s inductor and capacitor values are chosen so that Cs is effectively a short circuit and Llisn is effectively open-circuit at the measurement frequencies. The impedance at the converter’s input is therefore the 50W input impedance of the spectrum analyser. Clisn blocks any DC or mains-­ frequency AC from reaching the analyser, since the converter has to be powered up to make the measurements. The LISN’s component values are specified in the relevant EMI standard, but typical values might be Cs = 1µF, siliconchip.com.au Fig.3: we have to be concerned with both differential-mode and common-mode EMI currents – each of which poses unique filtering challenges. Llisn = 50µH and Clisn = 100nF. Most LISNs use air-cored inductors to keep stray capacitances low, and there may be a resistor in series with Cs to damp resonances (more on this below). There will probably also be a highvalue resistor (≥1kW) between the measurement terminal and common so that the measurement terminal does not float when no spectrum analyser is connected. Commercial LISNs may also include additional filter stage(s) on the source side to limit the influence that EMI entering from the source has on the measurement. The LISN network shown in Fig.2 is repeated on the positive and negative lines in a DC LISN, and on each phase and the Neutral conductor of an AC LISN so that common-mode and differential-mode measurements can be made. Australia's electronics magazine Common mode versus differential mode So far we have been analysing converters and their input filters using a huge assumption: we have assumed that all current flowing into one input terminal flows out of the other one as per the upper diagram in Fig.3. This has been a reasonable thing to do for everything we have done so far, but it does not stand up when we are looking at higher frequencies. The lower diagram represents an alternative high-frequency current path where there is some parasitic capacitance to Earth, for example between the drain tab of a TO-220 Mosfet and an Earthed heatsink. This current enters via the positive input terminal but returns to the source via Earth – there is no corresponding current coming out of the negative input terminal. March 2026  41 Fig.4: an LC differential-mode filter like this one may require damping to eliminate oscillations caused by gain peaking at the LC resonant frequency. This is just one possible alternative path for current to flow; there will be many in a real converter, including some related to the negative terminal. In reality, both types of current flow will be happening at the same time, so the currents labelled i1 and i2 will be the sum of the two. The current that flows into one terminal and out the other is termed the differential-mode current (idm), and the current that only flows into one terminal is the common-­ mode current, icm. The differential-mode current includes the normal operating current of the converter, including all of its harmonics, while the common-mode current is related to leakage paths. Mathematically, idm is defined to be ½(i1 – i2) and icm is i1 + i2. Note that both i1 and i2 flow into the converter in this model. These definitions give a clue to the names; differential-mode current is related to the difference in currents flowing into the converter, while common-mode currents are related to the total current flowing into both terminals. It is perhaps more intuitive to look at these equations from the other direction – in terms of the currents into the positive terminal and that coming out of the negative one, ie, i1 and -i2, respectively. In this case, i1 = idm + ½icm and -i2 = idm – ½icm. In other words, differential-­ mode current flows into one terminal and out the other, while common-­ mode current flows equally into both terminals and out somewhere else. Differential-mode input filter EMI standards put limits on both differential-mode and common-mode interference, so both have to be filtered. These two filtering problems are different in nature and have different challenges and solutions. We’ll start with the differential-mode filter. To do this, we will go back to the AC analysis model we created in Fig.1. The input filter was a simple capacitor, 42 Silicon Chip and we saw that its effectiveness was dependent on the source impedance. For EMI measurements, we can use a LISN to standardise the source impedance, but for everyday operation, we are stuck with an unknown impedance. We can reduce this dependence by employing an LC filter like that shown in the AC equivalent circuit of Fig.4. I have drawn this filter as it appears in the converter, with its input on the right and its output on the left. You might be wondering why, if this is the case, the inductor is on the output side of the filter and not on the input side, as is usual for LC filters. This is a current-sourced filter, so the source has a much higher impedance than the load (Zs). In a typical voltage-sourced filter, the source has a lower impedance than the load. In both cases, the filter works most effectively if the inductor is on the low-impedance side, since its impedance increases with frequency. The graphs to the right of the schematic show the current transfer function of the filter (ratio of output current is to input current ix), which looks like that of any typical LC low-pass filter. The cutoff frequency is 1 ÷ (2π√Lf Cf), and the roll-off is -40dB per decade. To the right of that is the filter’s impedance characteristic. At frequencies well below fc, the impedance is dominated by the inductance; at frequencies above fc, it is dominated by the capacitance. With ideal components, as we approach the cutoff frequency, the magnitude of the transfer function and impedance are theoretically infinite. With real components, there will always be some degree of natural damping, but LC filters often exhibit significant peaking at the resonant frequency, as shown dotted in the diagrams. LC filters tend to oscillate because of this peaking, especially if excited by a harmonic-rich square wave. This Australia's electronics magazine problem is compounded in power electronics because switching converters often have a negative input resistance. This negative resistance provides ‘negative damping’ and increases the likelihood of oscillation. To understand how a switching converter can exhibit negative input resistance, consider a DC-DC converter with a fixed output voltage and load. Under these circumstances, some amount of power is being delivered to the load and consequently drawn from the input source. If the input voltage were to rise a little bit, the control loop would adjust the duty cycle to keep the output voltage constant. The output power remains constant, so therefore does the input power, causing the input current to drop slightly. Ohm’s Law dictates that the input resistance is the change in voltage (positive in our example) divided by the change in current (negative), so the incremental input resistance must be negative. Damping For these reasons, it is quite common to require some form of damping on the input LC filter of a switching converter. Fig.5 shows one common way to do this. The damping capacitor Cd is larger than the filter capacitor, so it appears close to a short circuit at the undamped filter’s resonant frequency. This puts Rd effectively in parallel with Cf, providing the necessary damping. This series resistor/ capacitor combination is often referred to as a ‘snubber’. Selecting the damping resistor value is an optimisation problem. If it is too small, the damping capacitor appears in parallel with Cf, shifting the cutoff frequency but not contributing much damping. If it is too large, it also does not provide much damping. The optimum resistor value depends on the ratio of Cd to Cf, which is usually denoted by the Greek letter xi (ξ). siliconchip.com.au Their derivation is a bit complicated, but you can use the expressions to the right of Fig.5 to calculate the optimum value of the damping resistor and the resulting maximum impedance of the filter. The latter is important because we need to keep it low to reduce the impact of the converter’s negative input impedance. A realistic example It is probably easier to follow if we work through a simple example. Let’s assume we have a 60W buck converter with a 12V input and 6V/10A output operating at a frequency of 500kHz. The worst-case duty cycle is 0.5, so the AC input current will be a square wave with a peak-to-peak amplitude of 10A. Let us suppose that we want to design an input filter that reduces this current ripple by a factor of 100, to no more than 100mA peak-to-peak. We first have to work out the cutoff frequency of an undamped LC filter that will give us the required attenuation. We do this by initially assuming that most of the energy in the square wave occurs at the fundamental frequency. We know a square wave only has odd harmonics, and that their amplitude is given by In(pk-pk) = 2I(pk-pk) ÷ nπ, where n is the harmonic number. The peak-to-peak amplitude of the fundamental component of current will therefore be 6.37A. Just as a check, the next harmonic (the third) would have an amplitude 1/3 of that, or 2.12A, and each subsequent harmonic will have a proportionally lower amplitude. The desired attenuation factor of 100 means we require the peak-topeak amplitude of the fundamental component of the filter’s output to be 63.7mA or lower. We will use a lower value, say 25mA, to account for the fact that we have only considered the fundamental component. We can now calculate the required cut-off frequency to achieve this level of attenuation from the relationship is ÷ ix = fc2 ÷ fsw2. Rearranging and substituting in the switching frequency and currents gives us a filter cut-off frequency of 31.3kHz. We can use this to choose the filter components using the equation fc = 1 ÷ 2π√Lf Cf. However, we can’t just chose any values for L and C, because we also want to make sure that the filter’s impedance Zf = √Lf ÷ Cf is significantly siliconchip.com.au smaller in magnitude that the converter’s (negative) input impedance to minimise the probability of unwanted behaviour. The converter’s input impedance is easily calculated by Ohm’s law to be -2.4W (-12V ÷ 5A). If we therefore choose Zf to be 0.2W and use both equations, we end up with a value for Lf of 1.01µH and for Cf of 25.4µF. We can safely round these to 1µH and 25µF, respectively. Just out of interest, I simulated the circuit with these values and without any damping. I used a simple square wave current source (no negative impedance) and set the source impedance to zero, as per Fig.6(a). The result is shown in Fig.6(b). The switching frequency is certainly attenuated significantly (you can’t really see it), but the filter oscillates with a peak-to-peak amplitude of 12A at the resonant frequency. Clearly, we do need to add the damping capacitor and resistor. Given the filter capacitance Cf is 25µF, would be convenient to set ξ to 4, making Cd a nice round 100µF. The formulae in Fig.5 give us an optimum value for Rd of 0.14W and a maximum filter impedance of 0.17W. This is not a huge amount of damping resistance, so it is possible that some or all of it can come from the damping capacitor’s ESR if you were to use an electrolytic here – for once, the ESR of a capacitor comes in handy! I simulated the damped filter, with the results as shown in Fig.7. Note the difference in scales between the damped and undamped responses. You can see that the switching frequency ripple has been reduced to about 50mA peak-to-peak, inline with our design criteria, but there is some Fig.5: the addition of a damping resistor and capacitor, as shown here, is often necessary to minimise the oscillation in an LC filter. The optimum values can be determined from the equations on the right. Fig.6: the simulation circuit (left) to check the oscillation of an LC filter. Without damping (Cd and Rd omitted), the filter oscillates at its resonant frequency and with an amplitude of 12A peak-to-peak (below). Australia's electronics magazine March 2026  43 residual ripple (200mA peak-to-peak) at the filter’s resonant frequency. Fortunately, this is well below the bottom end of the EMI frequency range, so it might be something we could live with. Common-mode input filters A differential mode filter like this will have no effect on common-mode signals because there is a low impedance path for common-mode signals through it via the ‘ground’ line. A common-­mode filter therefore has to be effective on both conductors. This is often achieved with the use of coupled inductors, as shown in Fig.8. These are also often called common-mode inductors or common-­mode chokes. The windings are arranged such that the flux produced by differential-mode current cancels out, as shown at the left of the figure, while that due to common-­mode currents adds up. With perfect coupling, the differential-mode current, which includes the relatively high operating current, does not produce any flux in the core. No flux means no differential-mode inductance and no flux density, so the core can be much smaller than it would otherwise have to be. With perfect coupling, common-­ mode inductors present an inductance to common-mode signals but appear ‘invisible’ to differential-mode signals. Because the windings on these inductors are often at high voltages with respect to each other, they tend to be wound on opposite sides of a toroidal core, which means there will be some leakage inductance, so in reality there will be some meaningful level of differential-mode inductance, although lower than the common-­ mode inductance. You can see the common-mode inductor with the blue core in Fig.14 towards the top of the picture. The two windings and the spacing between them are clearly visible. Although it only produces a small amount of flux, the differential-­mode current still flows through the windings, so they must be dimensioned appropriately. Common-mode chokes are not restricted to two windings; three-winding common-mode chokes are used to build filters for three-phase systems, for example. When we designed the differential-­ mode filter above, we started with a clear model of the source current ix and worked from there. The source of the common-mode currents is leakage through circuit parasitics, so developing such a model is not really feasible. The ‘right’ way to start the design is to build the circuit without a filter and measure the raw common-mode noise across the spectrum of interest. We could then use the limits in the appropriate EMI standard to determine the required filter characteristic and proceed from there. Most of the time, this is not practical, and there are some practical limitations on the design of mains common-­mode filters that mean that many decisions are made for you. You can usually therefore do a good enough job by selecting ‘reasonable’ component values and validating through testing. Fig.9 shows a typical example of a single-stage common-mode filter designed for mains use, with the supply on the left and the converter (the source of the common-mode noise current) on the right. The common-mode inductance of L and the two Cy capacitors forms the common-mode filter. The leakage inductance of L and the capacitor labelled Cx2 form a differential-­mode filter. Capacitor Cx1 (not always present) provides some filtering of noise coming into the converter and reduces the input source impedance at higher frequencies. The resistor is there to discharge the capacitors when the mains is removed so the mains plug does not pose a shock hazard. Class-X & Class-Y capacitors Fig.7: adding the damping components reduced the ripple to 100mA peak-topeak. The 500kHz switching ripple is attenuated to approximately half of that. Fig.8: a common-mode inductor has two windings arranged so that the fluxes produced by differential-mode currents cancel and those due to common-mode currents add. 44 Silicon Chip Australia's electronics magazine It is no accident that I have labelled the capacitors X and Y. It is mandatory to use safety-certified “Class X” capacitors across the mains and “Class Y” capacitors from Active (or Line) to Earth. Apart from having appropriate voltage ratings, these capacitors are designed to fail safely. Class Y capacitors have the most stringent requirements; they are required to fail open-circuit so that the mains is never shorted to the device enclosure, endangering the user. Class X capacitors, on the other hand, are often designed to fail short-­ circuit. You can use an appropriately rated Class Y capacitor across the mains, but you should never ever use a Class X capacitor between Active/Live (or Neutral) and Earth. Safety-rated capacitors come in various sub-classes that denote the peak siliconchip.com.au voltage they can tolerate. Lower subclass numbers mean higher voltage capability. For our 230V mains voltage in Australia, you should use the X2 and Y2 subclasses as a minimum. The higher-rated X1 and Y1 subclasses are also OK, but not strictly necessary. Never use lower-subclass components or ones without the proper certification. You can easily recognise safety-rated capacitors because their cases are usually smothered in logos from certification bodies. The Class Y capacitors in a common-­ mode filter provide a leakage path from Active to Earth, so their maximum value is dictated by the acceptable leakage current at mains frequency. Industrial products can usually have a leakage current of no more than 0.5mA (at 250V AC), limiting Cy to a maximum value of about 6nF. This is why you will often see 2.2nF or 4.7nF ceramic Class Y caps in these filters. Class X capacitors can be larger; 220nF, 470nF or even 1µF values are not unusual. Much larger than this, and you run into problems discharging them fast enough. You can decrease the value of the discharge resistor only so far before its power dissipation becomes a problem. The higher Class X capacitance means that these filters can provide appreciable differential-mode filtering, even though the differential mode inductance is lower. Typical filters use common-mode inductors in the 0.33mH to 10mH range. If more attenuation is required, it is common to add a second or even third stage in series, rather than using larger inductors. Power factor correction (PFC) EMI filtering is concerned with high-frequency harmonics, but you will recall from the last article that with a sinusoidal voltage source, only the fundamental component of the source current contributes usable power (real power), designated ‹p›, with units of watts. The higher harmonic components of current do however contribute to the RMS value of current and therefore to the ‘apparent power’, S, defined as the product of RMS voltage and RMS current and having units of volt-­amperes (VA). The ratio of real power to apparent power, ‹p› ÷ S, is the definition of power factor. For unity power factor, the current must not only have a purely sinusoidal siliconchip.com.au Fig.9: a typical common-mode filter includes safety-rated Y-Class capacitors from Active to Earth and X-Class between Active and Neutral. It is really important to use the correct parts in these critical locations. Fig.10: a power factor correction circuit ‘spreads out’ the spiky current waveform produced when the capacitor charges at the peak of the mains. shape; it also has to be in phase with the voltage. For example, an inductive load such as a motor will not have unity power factor even though the current is sinusoidal, because of the phase shift between voltage and current. In this case, correcting the power factor can be as simple as adding a capacitor of appropriate value across the load to bring the phase shift between voltage and current back to zero. This is known as passive power factor correction. Things are not this simple with AC-DC converters, as we saw last time. The most common arrangement of a full bridge followed by a capacitive filter results in a current waveform with narrow spikes near the voltage peaks, corresponding to the period in which the capacitor is charged. This is illustrated in Fig.10. Active power factor correction aims to spread these peaks and make the overall source current waveform more sinusoidal in shape. Pushing current into the filter capacitor while the input voltage (shown dotted in red) is lower than the DC voltage implies that the PFC circuit must be capable of producing an output voltage higher than its input. The obvious candidate is a boost converter. Australia's electronics magazine Fig.11 shows the typical circuit of an active power factor corrector. A boost converter is interposed between the rectified mains input and the load (often another DC-DC converter). The boost converter is driven by a current-­ mode modulator, as shown in the diagram at the bottom of Fig.11. Crucially, its input reference current is forced into a ‘rectified sine’ shape. Thus, the boost converter produces a steady DC voltage across C1, but draws a roughly rectified-sinewave-shaped current through L1, and thus a nearsinewave-shaped current from the source. The current-mode modulator monitors the inductor current and controls the Mosfet’s on-time to make the current track the reference current, which is the output of the error amplifier/ compensator multiplied by the rectified sine signal. This latter is derived from the mains so that the input current is in phase with the voltage, resulting in a very good power factor. The load voltage must be higher than the peak of the mains, so it is normally set to about 400V. This allows for a wide range of AC input voltages – say, from 90V AC to 280V AC. You don’t have to use a boost converter, although this is by far the most popular topology due to its simplicity. March 2026  45 Fig.11: the PFC converter uses a current-mode boost converter to generate the output voltage. The reference current is modulated to shape the inductor current into a ‘rectified sinewave’ shape so the input current is sinusoidal. Fig.12: there are several alternative PFC topologies like these, but they all work on the same basic principle as that shown in Fig.11. You obviously can’t use a buck converter because it does not work when its input voltage is lower than its output, a state that will occur near every zero-crossing. PFC variants There are of course many variations on this theme, several of which I have shown in Fig.12. On the left is the interleaved power factor correction circuit. You can see that this is really two parallel boost converters, which are normally driven 180° out of phase with each other, feeding a common filter capacitor. This has the advantage of higher output power and effectively doubles the switching frequency as seen at the input, simplifying the input filtering. The next variant is described a “bridgeless” PFC converter, but this is 46 Silicon Chip a bit of a misnomer since the upper two diodes plus Mosfets and their body diodes clearly form a bridge rectifier. The functions of the rectifier and boost converter are integrated, providing better efficiency since several diode drops are eliminated. It can also be thought of as two boost converters in parallel, although this time each one is operating on alternate half-cycles. In theory, you can get away with a single inductor in one leg, but at the cost of increased common-­ mode EMI. An even more efficient variant is the so-called “totem-pole” architecture. Here, one Mosfet acts as a synchronous rectifier each half-cycle while the other is switching. This is more efficient than the bridgeless PFC because a Mosfet can have a much lower voltage drop than a diode. Australia's electronics magazine An even more efficient version uses four Mosfets, eliminating diodes altogether. There is a penalty to pay in terms of complexity with totem-pole PFC converters because they require a high-side driver. A practical PFC converter It is a bit beyond the scope of this article to run through the complete design of a PFC converter, but we can do the next best thing and take a look at a real example from an evaluation board; in this case, an EVL-4986-350W from ST Microelectronics (Fig.14). This is a 350W boost-converter type PFC based on the L4986 IC, a very typical example of the type of chip that is readily available these days. The circuit, redrawn from the EVL4986-350W data brief, is reproduced in Fig.13. siliconchip.com.au Fig.13: this circuit of the EVL4986-350W PFC evaluation board redrawn from its data brief. See the text for a full description. The mains input on the left is fused by F1 and protected by metal-oxide varistor (MOV) RV1. It is then fed through a common-mode filter consisting of two X2 capacitors and common-­ mode choke L3. This filter is missing its Class Y capacitors because this circuit has no mains Earth connection. There will be some common-mode rejection due to the voltage divider formed common-mode impedance of L3 and the common-mode load impedance (50W during EMI measurement). Diodes D8 and D9 connect the AC input to the HV pin on the controller. This pin is capable of withstanding up to 800V AC and serves several purposes. Firstly, it is involved in the startup of the controller. If a voltage exceeding about 29V is sensed on this pin, the capacitors on the Vcc pin are charged from it via an internal current limiter until it reaches a voltage sufficient for the control chip to start. Once the PFC converter is up and running, the Vcc pin is supplied by the auxiliary winding on the boost inductor L1, via a 100W series resistor, 100nF AC-coupling capacitor and diode D7. Zener diode D6 limits the Vcc voltage to a maximum of about 18V. The HV pin is also used to sense the AC voltage for the undervoltage/ brownout protection circuit and to provide the modulation required to shape the input current. The HV pin can also detect when the mains is removed and switch in a current sink to discharge the X-capacitors, obviating the need for a discharge resistor and its associated power dissipation. That’s a lot of functions for one pin! The AC input is rectified by a 15A 600V bridge rectifier (D3) mounted on one of the two heatsinks. The rectifier is followed by a differential-mode siliconchip.com.au filter comprising L2 and a 1μF capacitor, which reduces the fundamental of the 65kHz switching noise at the input by a factor of around eight and the higher harmonics by a proportionally greater factor. The boost converter consists of the inductor L1, Mosfet Q1 and diode D1, with one 470nF and two 100μF capacitors forming its output filter. Diode D2 precharges these capacitors when the mains is first applied so that the boost converter can start up much faster than it would if it had to charge them from zero. The 1W cold resistance of the NTC thermistor limits the capacitor inrush current, but as current flows through it in operation, the resistance drops by a couple of orders of magnitude and it can be more-or-less ignored. The Mosfet current is sensed across the three parallel 0.22W shunt resistors below L2. The resulting (negative) shunt voltage is fed via a 51W resistor to the controller IC, where it is compared to the current reference to determine the Mosfet switch-off instant. If the CS pin voltage falls below -0.49V, an internal overcurrent comparator overrides the modulator, limiting the peak current to about 6.7A. The Mosfet gate is driven via 3.9W and 6.8W resistors, plus diode D4. This network allows for separate control of the Mosfet’s switch-on and switch-off times. Q1’s gate is charged (to switch it on) via just the 6.8W resistor but is discharged via both resistors in parallel, compensating for the Fig.14: the PFC evaluation board described in the text. The input connector is hidden behind the large boost inductor, and the output connector is at the front right. Australia's electronics magazine 47 Type II compensator, which has two poles and one zero. For more details, see the second article in this series, published in the December 2025 issue (siliconchip.au/Article/19370). The compensator poles and zeroes are positioned to provide dominant-pole compensation to the overall open-loop gain. The red line in Fig.15 shows the frequency response of the PFC’s Fig.15: the compensator for the PFC modulator and output filter. This converter is similar to that for a has a single pole at fco, determined conventional DC-DC converter. The by the converter’s output capaccrossover frequency must be lower than itance and its load resistance, 100Hz or the control loop will try to and a zero formed by the output eliminate the modulation we need to capacitance and its ESR. The outshape the input current. put capacitance is 200µF and the fact that the STF36N60M6 has a much minimum load resistance is 457W slower inherent switch-off time (50ns) (400V2 ÷ 350W), so the pole occurs at than its switch-on time (15ns). about 1.74Hz. Output voltage feedback is proWe don’t need to worry about the vided to the FB pin on the controller frequency of the zero formed by the IC (U1) by the divider formed by the output capacitance and its ESR for reathree 2.2MW resistors, together with sons that will become apparent soon. the series/parallel combination of four The cyan/blue line shows the different-­ value resistors to ground desired open-loop gain required for (16kW, 100kW, 30kW & 360kW). stability, rolling off at a steady -20dB This feedback voltage is internally per decade from the origin (effectively compared to a 2.5V reference to cre- DC), then taking a turn down to -40dB ate the error signal. Like the current per decade at frequency fp. sense input, an independent comparIn a normal converter, we would ator shuts the boost converter off if the position this pole to cancel the filfeedback voltage exceeds the reference ter’s ESR zero to maximise the bandby more than about 7%. width of the control loop. However, If the voltage at the feedback pin for PFC converters, we have to limit falls below about 0.5V, the controller the loop bandwidth so the crossover enters ‘external burst mode’, in which frequency (the frequency where loop switching is inhibited. This prevents gain falls to 0dB) is below twice the the output voltage from rising uncon- mains frequency. trollably in the case that the voltage We have to do this so the control sense resistors become open-circuit loop does not respond to the 100Hz and also allows an external control- ripple on the output and try to counler to switch the converter off via Q4. teract the very modulation we are relyThis feature might be used to reduce ing on to shape the current. power when a following converter was The compensator’s second pole (the disabled or had a very light load. Dis- first is at the origin) is therefore typiabling and enabling the PFC in this cally placed at some frequency, fp, that way is fast because the control chip forces the crossover frequency to be does not go through the whole start-up Fig.16; the upper procedure each time. trace shows the PFC The voltage feedback divider douconverter’s input current bles as an input for the controller’s at near full load. The power-good comparator. If the voltage current is similar in at the PGIN terminal exceeds 2.375V, shape to the input the open collector ‘power good’ (PG) voltage shown below. pin is asserted low. The measured power Compensation less than 100Hz. The filter zero caused by the output capacitance and its ESR is therefore more-or-less irrelevant since the control loop is not effective at this frequency. The evaluation board’s compensator has its zero set by the 62kW resistor and 1.5µF capacitor near to 1.71Hz – pretty much bang on the output capacitance/ load resistance pole. The upper pole is set to 17.1Hz by the 62kW resistor and 150nF capacitor, well below the 100Hz ripple frequency. I have not mentioned transistor Q3 and its associated base drive components yet. The controller chip has a threshold detector on the COMP pin that shuts down the PFC converter if the voltage is below about 0.5V. This can be used to stop and start the converter, but unlike Burst Mode control, the converter goes through a full softstart cycle when enabled. Testing I tested the PFC evaluation board on my bench with a 500W load. The current and voltage waveforms are shown in Fig.16. The current (green trace) is certainly close to a sinusoid, but has some visible vestiges of switching ripple. Its shape tracks the input voltage (yellow trace) almost exactly, including its slightly flat top caused by all those non-PFC converters on my line. The RMS current and voltage measurements on the right must each be scaled by a factor of 10 for 243V and 1.33A respectively, giving an apparent power of 323W. The average DC voltage and current in the load measured 396.7V and 0.785A, respectively, for a real power of 311.4W. The resulting power factor is 0.96, which is about as good as we could expect. We have now covered DC-DC converters and AC-DC converters in a fair bit of depth. Next time, we will dive into the interesting world of DC-AC SC converters. factor was 0.96. The internal error amplifier’s compensation is set by the network hanging off its pin 8. This forms a classic 48 Silicon Chip Australia's electronics magazine siliconchip.com.au