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Circuit Surgery Regular clinic by Ian Bell Problems with SPICE simulations J ohn Curtin posted a question on the EEWeb forum about a problem simulating a circuit in LTspice. ‘I need help for LTSpice, if possible. I’m simulating an RC net to charge an electrolytic capacitor through a resistor (Fig.1). The voltage on the capacitor should be ascending, according “constant of time”, instead it’s fixed to 12V. Can you help me, please? Thank you.’ As often happens on EEWeb, a solution was provided by another forum member, Giovanni Di Maria in this case, and we will discuss this and other approaches shortly. This question is an example of an apparently simple simulation appearing not to work properly – a not uncommon experience for new users of analogue simulators. As regular readers know, we make frequent use of LTspice simulation to illustrate Circuit Surgery discussions, and since October 2018 several Circuit Surgery articles have been dedicated to getting started with using LTspice. So this article is effectively a continuation of that, and we will look at a few things that might go wrong and one or two commands or settings which may resolve problems. Our version of John’s circuit is shown in Fig.2 – the only difference is that we have given names to the nets (wires) in the circuit. This is useful because it makes it easier to see which signal is which in a results plot. LTspice automatically names nets (eg, n001, n002,...) but it is easy to get confused about which trace you are looking at, and if you accidently clicked in the wrong place when probing it may not be obvious if you are looking at meaningless node names on the waveform plot. However, this is not the problem in this case, and the simple circuit layout and small size make the issue minimal here. In general though, it is good practice to name all the nets you are interested in plotting data for. Use the Label Net command button or Edit > Label Net from the menu. Charging Before simulating a circuit it is a good idea to have some idea of what to expect based on the theory of operation. It is useful to estimate parameters such as expected voltages, frequencies or timings. These figures help us choose appropriate simulation settings, such as how long to simulate for. Here, we have a capacitor charging via a resistor, so we expect the voltage to rise following an exponential curve, asymptotic with the applied voltage. There is a well-known formula that we can use to find the time taken for the capacitor to charge. Specifically, for a charging capacitor the time (t) taken with SPICE simulations to Problems reach voltage Vt charging from 0V towards an applied voltage of V a is given by: ⎛ V ⎞ t = − RC ln⎜⎜1 − t ⎟⎟ ⎝ Va ⎠ Where ‘ln’ is the natural logarithm of the item inside the brackets. In John’s circuit the capacitors are charging ⎛1⎞ towards so V = 12V. If we choose, t1 = − R12V, 2 C1 ln⎜ ⎟ a= 0.69 R 2 C1 ⎝ 2 ⎠ to reach 90% of the say, the time taken applied voltage (about 11V), then Vt = 11V. We can then plug all the values into the above equation and get a Vt 1⎞ of about 25s. ⎛John’s simulation is set t 2 = − R3C2 ln⎜ ⎟ = 0.69 R3C2 to run a transient ⎝ 2 ⎠ analysis (time-based simulation) for 60s of simulated time (.tran 60) so we should see the voltage f = 1 Hz 1.38 RC Fig.1. John Curtin’s LTspice circuit from the EEWeb forum. Fig.2. John’s circuit with node labels added. 44 Fig.3. Simulating the circuit in Fig.2 does not produce an RC charging curve. Practical Electronics | April | 2020 Fig.4. Running a DC operating-point analysis. getting very close to 12V about half way through – this is a sensible choice of simulation time and is not the reason for the flat 12V result. Numerical integration The result of running the transient simulation for the circuit in Fig.2 is shown in Fig.3. As John described it, the output voltage is indeed fixed at 12V. At this point some people may be inclined to think the simulator has got it wrong – it can happen. In this case, however, it hasn’t, but to understand why you need to know what SPICE does when it performs a transient simulation. In order to perform a transient simulation SPICE has to do numerical integration of the differential equations that model the behaviour of capacitors and inductors. Here, ‘numerical’ refers to mathematical techniques and algorithms that solve problems by estimating numerical solutions rather than by using symbolic manipulation of equations. It is called ‘integration’ because it is attempting to solve the differential equations decribing the circuit’s behaviour. Numerical integration methods attempt to find the shape of an unknown curve (such as the waveform in a circuit). This is on the basis that, although the curve is initially unknown, we do know the starting point. Numerical integration techniques estimate the next point along the curve, close to the starting point – for simulation waveforms this point is a small time step into the future of simulated time. Once the new point is obtained it becomes the start point for the next estimate. Of course you have to start somewhere at the very beginning (at simulation time zero) and SPICE simulators find the initial starting point by performing a DC operatingpoint analysis. Practical Electronics | April | 2020 Fig.5. The startup option for transient analysis. Operating point A ‘DC operating-point analysis’ treats capacitances as open circuits and inductances as short circuits and (as its name suggested) calculates the voltages and currents in the circuit with only the DC components of any sources applied. This may be familiar to readers in the context of working out the ‘bias point’ in circuits, such as transistor amplifiers (also referred to as the ‘operating point’), but can be performed on any circuit. Another way to view this is finding the circuit’s state after infinite time – that is, any changes that might have occurred when the DC sources ‘switched on’ have settled down and we have the final steady value. Looking at the circuit in Fig.2 with just DC voltages considered (which is all we have in this case), and working out what happens with ‘capacitances as open circuits and inductances as short circuits’, we would expect zero current in R1 due to the open circuit at C1, so there will be zero voltage dropped across R1 and the output would be at 12V. If we think about the circuit settled after infinite time, then C1 will have been fully charged to 12V and there would be no voltage across the R1 – it is the same result. This is the starting point for John’s simulation, and, as there is nothing in the circuit to cause any change after this, the voltage across the capacitor remains at 12V, as we see in Fig.3. LTspice can run just the operating point analysis and give you the results as a list of voltages and currents. If you have already tried the simulation set up as in Fig.2 and Fig.3, then try this by changing the simulation command. With the schematic selected, do Simulation > Edit Simulation Command. In the simulation command dialog (see Fig.4) select the DC op pnt tab and note the comment about computing the operating point (as discussed above). Change the command text to .op (it may be .op 60), click OK and click on the schematic to place the command. Then run the simulation. The results will appear in a text widow and should be similar to the following: --- Operating Point --V(out): 12 voltage V(in): 12 voltage I(C1): 1.2e-014 device_current I(R1): -1.2e-014 device_current I(V1): -1.2e-014 device_current The exact current values may be different as they are approximations to zero (in this case 12fA (one femtoamp = one billionth of a microamp). There a few ways in which we can obtain a simulation which produces the capacitor-charging curve that John expected. These can be divided into two general approaches. We can use simulator commands (SPICE directives, and . t r a n command options) to change the way in which the existing simulation operates. Alternatively, we can change the simulation to include changing conditions, which result in the capacitor charging. Startup The fact that we might want to simulate a situation in which the DC voltages start at zero and switch on (like a power supply) is recognised by an option, which is available for transient simulation. Assuming you have the simulation in Fig.2 and Fig.3 set up and have tried the operating-point analysis, close the results window and open the simulation command dialog 45 constrains the solution to use these values). It can be used to set initial voltages on nets (and hence across capacitors), or currents in inductors. Here we can set the initial voltage on the output to 0V, which will start the simulation with C1 discharged. Specifically, we use the directive: .ic V(out)=0 Fig.6. Simulating the circuit in Fig.2 with the start-up option. This sets the initial output voltage to zero. To do this, starting from the simulation that produced the results in Fig.6 and Fig.7, first edit the simulation command again and uncheck the startup option (the command should be just .tran 60). Then click on the .op button and enter the .ic directive text in the box as shown in Fig.8. Click OK and click on the schematic to add the directive. Then run the simulation. The results will be almost the same as in Fig.6 except that V(in) will be 12V from the very start of the simulation. Pulse Fig.7. DC source ramping with startup option. again. Select the Transient tab and reenter the Stop time: as 60. This will restore the simulation to that used by John. Now also check the Start external DC supply voltage at 0V option (see Fig.5 – note the simulation command is now .tran 60 startup). Click OK in the dialog and run the simulation. The results are shown in Fig.6, where we see the RC charging curve with the timing calculated earlier. The startup option causes the DC sources to start at 0V and ramp up to their designated voltage in 20µs. Starting V1 at 0V causes C1 to start with 0V across it, so once V1 reaches 12V, C1 will start charging towards this value. This start-up ramp can be seen by displaying V(in) and zooming in to the first few tens of microseconds of the simulation, as shown in Fig.7. In this case, the ramp time is so short compared with the time constant of the RC circuit that the simulation follows the expected step response, but if the capacitor was much smaller V(out) would basically 46 track the V1 ramp rather than following the exponential charge curve. Initial condition A different approach to the simulation, as noted earlier, is to create a dynamic situation in the circuit – to somehow switch the voltage applied to the RC circuit during the simulation, rather than producing the curve from a constant DC source. One way to do this is to modify the circuit to include a switch to connect or disconnect the voltage applied to the capacitor, but this means modifying the circuit to add the switch and a control signal for it. A simpler approach is to modify V1 to apply a pulse rather than a fixed DC voltage. To do this, right click on V1 on the schematic and click the Advanced button on the first dialog that appears. A new window opens which allows us to configure the source. Select PULSE from the functions list and set the parameters shown in Fig.9. This will create a single pulse of width 60s, switching from 0 to 12V, starting at 5s. The voltage will switch in 20µs. This is the same as the startup ramp used earlier, but here we can choose whatever time we want. Click OK – the Another approach to achieving the RC curve is to set an initial condition in the circuit. This was the approach suggested by Giovanni Di Maria on the EEWeb form. We can do this using a .ic (initial condition) SPICE directive. SPICE directives can be used to provide additional instructions to the simulator beyond those contained directly in the simulation command (such as . t r a n and . o p which we have already seen), which are themselves SPICE directives. The .ic directive forces the DC operating point analysis to use the values specified in the directive (it Fig.8. Entering a SPICE directive. Practical Electronics | April | 2020 charge during the brief time T2 took to switch on, and means the voltage at the base of T1 will have dropped to around −VCC, turning T1 fully off. At this point, the voltage across C1 is quite small (the difference between the VCE saturation voltage of T1 and the VBE of T2, so 0.6V to 0.7V or lower). The process described above repeats on opposite sides of the circuit. C2 charges up towards +VCC from –VCC via R3. At this time, the voltage across C1 charges from the small voltage it had at the switching point towards V CC. The circuit switches again when C1 charging through R3 brings the VBE of T1 to around 0.6V, switching it on and T2 off. We are back to the start of our description and the whole cycle starts again. The speed at which the circuit switches is determined by how long C1 takes to charge from –VCC via R2 to turn on T2; and how long C2 takes to charge from −VCC via R3 to turn on T1. We can calculate this using the same capacitor-charging equation we used for John’s circuit above. Fig.9. Setting up a pulse from V1. text describing the pulse: PULSE(0 12 5 20u 20u 60 120 1) should appear on the schematic. In order to see the effect of the pulse switching to zero it is useful to extend the simulation, so edit the simulation command to run it for 130s (.tran 130). Running the simulation should produce the results shown in Fig.10. We can see both the charge and discharge curves. Retro The circuit in Fig.11 provides another example of a circuit where initial conditions cause a problem with simulation. It is an oscillator; more specifically it is an astable, or freerunning multivibrator. This is a ‘retro’ circuit, which is perhaps little known (and used) now, as we tend instead to employ a variety of special-purpose oscillator or waveform generator ICs, or use microcontrollers to generate timing signals. But it is useful as an example here. As noted above, before simulating any circuit you should have some understanding of the basic principles of its operation; have some idea of voltages (and currents) likely to occur in the circuit, and be aware of the expected shape and frequency of key waveforms. So we will now look at the operation of the circuit in Fig.11 and obtain an equation for its oscillation frequency. towards V CC via R2. Our assumption that T2 is off implies that the voltage at the base of T2 is currently somewhat less than 0.5V. At the same time, the voltage across C2 will be at, or charging towards, something close to VCC. This is because one end of C2 is connected to VCC via R4, and the other is held at around T1’s VBE of about 0.7V. T1 does not influence the voltage across C2 at this time because it is fully switched off. As C1 charges through R2, the voltage at the base of T2 rises and eventually T2 will turn on. At this point, the voltage at the collector of T2 falls very rapidly to close to 0V (as T2 saturates). The voltage across C2 is around VCC with the T2 collector side of C2 positive. This is because C2 will have held its Calculation Problems with SPICE simulations The capacitors are charging from –VCC towards +V CC , which in effect is an Problems with SPICE applied voltage of Va =simulations 2VCC. The time we need is when the capacitor voltage ⎛ Vt ⎞ is tsufficient ⎟⎟ on the transistor = − RC ln⎜⎜1to − turn ⎠ – that is, it⎝ hasVacharged from −VCC to +VBE. If we ⎛ignore Vt ⎞ the value of VBE for ⎜⎜1 − can⎟⎟ take the voltage of t = − RC lnwe simplicity Va ⎠ interest as ⎝being V CC above the start point, so V t/V⎛ a1 is ⎞ V CC/2V CC = ½, and t1 = −equations R 2 C1 ln⎜ ⎟for = 0.69 R 2 C1 timing ⎝ 2 ⎠ the circuit become: ⎛1⎞ t1 = − R 2 C1 ln⎜ ⎟ = 0.69 R 2 C1 ⎝2⎠ ⎛1⎞ t 2 = − R3C2 ln⎜ ⎟ = 0.69 R3C2 ⎝2⎠ ⎛1⎞ t 2 = − R3C2 ln⎜ ⎟ = 0.69 R3C2 ⎝2⎠ f = 1 Hz 1.38 RC f = 1 Hz 1.38 RC Operation Assume that T1 is fully on and T2 is off. This means that one side of C1 is effectively connected to ground (0V), via T1 and the other side will charge Practical Electronics | April | 2020 Fig.10. Results of simulation using a pulse source. 47 Problems with SPICE simulations ⎛ V ⎞ t = − RC ln⎜⎜1 − t ⎟⎟ ⎝ Va ⎠ suddenly drop to about −V CC and immediately follow a resistor-capacitor charging curve back up to about 0.6V, where the voltage will remain more or less static for half of the oscillation cycle. Flatline Now we know what to expect, we can set up a suitable transient simulation. Given that one cycle is around 7ms, a transient simulation of ⎛1⎞ t1 = − R 2 C1 ln⎜ ⎟ = 0.69 R 2 C1 50ms seems reasonable. ⎝2⎠ U n f o r t u n a t e l y, i f w e Fig.11. Two-transistor astable multivibrator LTspice schematic. run this, the expected oscillation does not happen. Both collectors stay at about The period of oscillation is t1+t2. If we ⎛1⎞ 30mV and both bases are at about uset 2 equal values = − R3Ccomponent R3C2 in the two 2 ln⎜ ⎟ = 0.69 2⎠ 650mV throughout the simulation. halves of the ⎝circuit, so that R1 = R2 We have another flatline simulation = R and C1 = C2 = C, t1 + t2 is 1.38RC when we expected something more and so the frequency of oscillation is: interesting to happen – what is wrong? 1 The schematic in Fig.11 is perfectly f = Hz symmetrical – both halves of the circuit 1.38 RC are exactly the same. In fact, the circuit will behave in the same way if you From the values used in the circuit in removed the capacitors, creating two Fig.1 we would expect a frequency of isolated sub-circuits. The exact symmetry oscillation given by: f = 1/(1.38 × 1.0 is present in the simulated circuit, but × 10 −7 × 5.0 × 10 4 ) = 145Hz, which the probability of it happening in a real is a cycle time of 6.9ms. We would circuit is so small as to be effectively expect the voltage at the collectors of the zero. What we have is a situation of two transistors to alternately rise from perfect balance in an unstable system, 0V to close to the supply, following a like balancing a ball on the point of a typical capacitor charging curve, and needle; it might be theoretically possible, then very rapidly returning to 0V once but in a real system there is always some the transistor switches on, where it will asymmetry, or external disturbance, remain for the rest of the cycle. In each which causes imbalance. cycle we expect the base voltages to Fig.13. Measuring the frequency using the waveform cursors. Oscillation In the real astable, one transistor will switch on slightly faster than the other when power is first applied, the feedback in the circuit will cause the other transistor to tend to switch off and the faster transistor to switch on more. Thus the circuit will quickly tip into one of two possible initial states and will then start to oscillate in the manner already described. We can get the circuit to oscillate in the simulator by forcing an imbalance at the start of the simulation. One way of doing this is to use the .IC SPICE directive, discussed above. We can use the following .IC statement to set the initial voltages on the two outputs (collectors) to 0V and 5V, thereby ensuring the circuit starts in an asymmetric state. The transient waveform will start from the conditions set by .IC. .ic v(op1)=0 v(op2)=5 The resulting simulation waveforms (first 20ms) are shown in Fig.12. The shape of the oscillation waveforms fits with our earlier reasoning about the circuit’s behaviour, giving us confidence that it is correct. Using the cursors – obtained by right-clicking the signal names at top of the waveform traces – we can measure the frequency of oscillation. Using V(op1) and aligning the cursors with two successive points where the steep voltage drop occurs produces the results shown in Fig.13. We can read the frequency directly as 138Hz, which is close enough to our estimate above to indicate the simulation is working as expected. Simulation files Fig.12. Working simulation of the astable in Fig.11. 48 Most, but not every month, LTSpice is used to support descriptions and analysis in Circuit Surgery. The examples and files are available for download from the PE website. Practical Electronics | April | 2020