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down counter, IC4. The borrow output
at pin 13 is usually high, so the pin 3
voltage level from IC1 is inverted by
IC3c and then inverted again by IC3d.
This causes the counter to decrement
on the initial press of S1.
If the counter’s output at Q0-Q3
reaches 0000, the borrow output goes
low, forcing the IC3c output high and
hence IC3d’s output goes low, preventing further decrementing. This is the
negative ‘end stop’ which prevents the
volume from jumping from maximum
volume to minimum.
A similar operation occurs with
IC2 and NAND gates IC3a and IC3b.
The difference is that the counter is
incremented instead of decremented,
and stops when outputs Q0-Q3 reach
(1111) or minimum volume.
Note that the counter counts down
to increase volume and counts up to
decrease volume. That’s because maximum volume (minimum attenuation)
occurs when Q0-Q3 are all low.
IC4 includes a preload feature,
where the Q0 to Q3 outputs can be
set to a particular value during power-up. Jumper links JP1-JP4 set the
power-up volume level. If no jumpers
are inserted, the preload inputs at P0
to P3 are all held high via 10kW resistors and the unit is at minimum volume (maximum attenuation).
To determine the initial attenuation
setting, take the binary number formed
by jumpers JP1-JP4 (with a shorting
block being 0 and open-circuit being
1), convert it to decimal and multiply
it by three.
This is the initial attenuation in dB.
For example, with JP1 & JP3 in and JP2
& JP4 out, the binary number is 0101,
five in decimal, and times three gives
15dB attenuation.
Volume control
The audio signal is applied to a
buffer circuit (IC5a for the left channel) operating as a unity-gain amplifier. The op amp needs ±5V supplies
which can be obtained from existing
supplies in a preamplifier. Regulators
may be required to reduce the voltages
(eg, 7805 and 7905 types).
The TL072 type op amps shown can
handle signals up to about 2.5V RMS
before clipping with such a supply. If
you use rail-to-rail op amps instead,
that would allow for signals up to
about 3.5V RMS. You could also consider using lower distortion op amps.
Do not use a higher supply voltage
siliconchip.com.au
since the following analog switches
may be overdriven.
The output from IC3 is applied to
a 16-level attenuator controlled by
the Q0-Q3 binary outputs from IC4.
The attenuation is logarithmic, and
we have set the range to be from zero
attenuation down to 45dB attenuation
in 3db steps.
There are four attenuation stages.
The first stage provides 24dB attenuation, the second stage, 12db, the
third stage 6dB and the final stage,
3dB attenuation. With various combinations of these attenuators, we can
obtain 16 steps.
Each attenuator comprises two
or three resistors and a changeover
switch. With the switch in the ‘NO’
position, it completes a resistive
divider from the preceding stage to
ground, with the attenuated signal
appearing at the resistor junction feeding into the next stage. With the switch
in the ‘NC’ position, the divider is disconnected, and the upper resistor(s)
are ‘shorted out’, so the stage has no
attenuation.
Calculating the required resistor values is done assuming that the source
impedance is zero for the first stage,
which is reasonable as it is from an op
amp output.
The second stage calculation is
for 12dB attenuation, and the source
impedance is now 25kW (due to the
25kW output impedance of the first
stage). The stage output impedance
also 25kW. The following stages are
calculated using the 25kW input and
output impedance values.
The output from the attenuators
is applied to another op amp buffer, IC5b.
The attenuator switches are
TS5A22362 dual-channel SPDT analog
switches. These are interesting because
not only are they very low resistance
switches (0.65W typical), with low distortion (below 0.0041% at 1kHz) but
also the signal can be below the supply
rails for the switch. So while we run
each switch IC from a 0-5V supply, the
applied signal can be up to -5V without causing extra distortion.
If you plan to use a different analog switch, make sure the supplies
(and control voltage) for the switch
are suitable.
John Clarke,
Silicon Chip.
Original concept:
Raj. K. Gorkhali, Nepal. ($75)
Australia's electronics magazine
An easy way to
measure SMDs
Here is an idea inspired by the SMD
Test Tweezers project (October 2021;
siliconchip.com.au/Article/15057).
When using fat leads from a multimeter or similar to test small individual
SMD components, they have a habit
of acting like a circus flea and jumping
out of sight, never to be found again.
To solve this, I added a thin copper
film recovered from an SMPS transformer to the teeth of a cheap set of
callipers (which should be made from
an insulating material) and secured the
test leads to the copper. I used super
glue to hold the film to the callipers.
The smallest SMD component can
be firmly captured and restrained from
escaping. I modified a second calliper with longer leads to connect to a
multimeter for holding and measuring resistors.
Michael Harvey,
Albury, NSW. ($60)
June 2022 91
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