Fullscreen HTML5Med Res (??MB)HTML4

Accuracy better than 100 parts per BILLION! Lab Quality Programmable GPS-synched FREQUENCY REFERENCE ... ... ... Part 1 – by Tim Blythman Whether in design, service & repair, calibration or any other critical task in electronics there are times when a really accurate and stable frequency reference is needed. The chances are, whatever frequency you require, this Micromite BackPack-based project can provide it. Exactly! O ur new GPS-based Frequency Reference provides three high accuracy, customisable outputs which are set up using a touchscreen and synchronised to the 1PPS signal from a GPS module. Two of these can be set to a wide range of frequencies over the range of about 1-100MHz. The onboard temperature-compensated oscillator is within a temperature-controlled oven for maximum stability. Not only is its GPS-synchronised oscillator very stable but you can choose from a huge range of possible output frequencies – in fact, it has three separate outputs, so you can even produce more than one signal at a time. It’s especially useful in combination with frequency counters, oscilloscopes and spectrum analysers with external reference inputs, especially if their inbuilt oscillator is not terribly accurate. For example, many devices need a 10MHz reference and this unit can produce that exact frequency. But it’s also quite common to see test equipment needing some oddball frequencies, so you can set up one of the outputs to cater to those too. We’ve gone to quite some length to make this design not only very accurate and flexible but also com28 Silicon Chip pact, easy to build, easy to use and relatively inexpensive. And we have also addressed most of the criticism levelled at our previous design, mainly to do with its ability to reject jitter from the satellite signals. We satisfied the compactness and ease of construction requirements by making this unit considerably simpler than our previous design (March-May 2007 & September 2011; siliconchip.com.au/Series/57). This is possible because we are using a substantially more powerful micro (a PIC32) so we’ve been able to replace a substantial portion of the hardware with software routines. So this unit is not only better than the earlier models, it’s cheaper! Since this project is based on the Micromite LCD BackPack V2 (May 2017; siliconchip.com.au/Article/10652), the touchscreen eliminates the need for all the extra display and button sensing circuitry and the need for many cutouts in the front panel. Australia’s electronics magazine siliconchip.com.au We can supply a kit to build the BackPack module; see the parts list for details. The simplification of the circuitry has also meant that we can fit the extra circuitry on a much smaller board. In fact, it’s now a similar size to the BackPack and simply stacks behind it, so the whole lot will easily fit into a small UB3 Jiffy box. And the touchscreen means we can make the user interface much easier to understand and simpler to use, with a lot of extra features. But it’s the triple PLL IC which provides the pièce de résistance, that is, the three configurable outputs. One of the outputs is limited to a small range of frequencies (including that all-important 10MHz option) but for the other two, you can type in just about any frequency and chances are, it will produce that exact frequency, or something very close. And if it isn’t exact, it will tell you the difference. Excellent long-term precision The jitter reduction mentioned earlier is possible because we are no longer using a phase-locked-loop (PLL) IC to lock the voltage controlled oscillator (VCO) onto the GPS 1PPS signals. A PLL will adjust the VCO frequency immediately upon detection of a phase difference but that could just be due to jitter. Instead, we’re using a software algorithm which averages the VCO frequency over a range of time periods and makes small, calculated adjustments to the frequency. We’ll have more on that algorithm in the next article in this series. Also, for it to be as effective as possible, we need an extremely stable oscillator. This has been achieved by putting a temperature-compensated oscillator in a temperature-controlled oven, along with a very stable reference regulator which is used to derive the VCO’s control input voltage, Features & Specifications • Main 40MHz oscillator is disciplined from GPS signals • Accuracy of around ±100ppb after 30 minutes • Three BNC outputs with programmable frequencies: ~ 1-100MHz • Main oscillator is temperature compensated and oven regulated • MicroMite BackPack-based 320 x 240 pixel LCD touchscreen for configuration and status • Compact unit, 160 x 68 x 44mm overall (in UB3 Jiffy box) • Powered from 5V USB supply <at> 400mA (500mA at start-up) • Optional disciplined 1PPS output • Works with a wide range of GPS units, with external or internal antenna • Low parts count • Modest parts cost • Most parts are easy-to-solder SMDs along with a DAC that can produce very small voltage steps. The end result is that with a satellite-derived 1PPS signal with sufficient long-term accuracy, we can trim the VCO’s output so that its error is measured not just in parts-permillion . . . but in parts-per-billion! Since the new unit is simpler, we’ve also managed to make it use much less power. Rather than needing a 12V supply, it runs off 5V instead. That simplifies the power supply and the unit simply runs from any USB (5V) power source such as a phone charger or even directly from a computer. Principle of operation The block diagram, Fig.1, shows the basic principle of the Fig.1: block diagram of the Programmable GPS-Synched Frequency Reference. The VCO is located in the oven section, with transistor Q1 and a DS18B20 thermometer used to maintain it at a fixed temperature. This feeds the PLL, which then routes the signal to the Micromite and to the three outputs. The Micromite chip can then send commands to DAC IC1 to shift the VCO frequency via buffer IC3, to discipline the 40MHz VCO frequency using 1Hz pulses from the GPS module. siliconchip.com.au Australia’s electronics magazine October 2018  29 Frequency Reference. The oven section is shown at upper left, and inside it, there is a voltage-controlled oscillator (VCO1), a DS18B20 temperature sensor and transistor Q1. The Micromite controls the output voltage of the DAC (digital-to-analog converter – IC6) using an SPI (serial pe- 30 Silicon Chip ripheral interface) bus. This voltage affects the dissipation in transistor Q1 and it heats up the components inside the oven, including the digital temperature sensor. The temperature reading is fed back to the Micromite over a Dallas 1-wire serial bus and this information is used to Australia’s electronics magazine siliconchip.com.au adjust the voltage fed to Q1, regulating the oven temperature. A second SPI DAC, IC1, produces a voltage which is buffered by IC3 and then fed to the VCO, to shift its output frequency slightly, over the range of 39,999,800-40,000,200Hz. The initial tolerance of the VCO is ±2ppm which equates to ±80Hz, with a drift of up to ±1ppm (±40Hz) per year, and some small additional variation with temperature or supply voltage changes. By shifting the VCO frequency, we can compensate for these errors, getting its output very close to exactly 40,000,000Hz. Once the oven reaches the target temperature, it varies over a range of less than 1ºC, improving the stability of the VCO into the parts-per-billion range. The trimmed frequency from the VCO is fed to a multi-PLL chip, IC2, and from there back to a high-frequency counter within the Micromite. The Micromite can then count the number of pulses received between each 1pps pulse from the GPS module to determine whether the VCO’s frequency is spot on. If it is not, the Micromite adjusts the drive to the VCO to bring it back in line with the GPS pulses. Note that it can also average its readings over a longer period to reduce the influence of jitter in the GPS 1pps pulses on the output of the VCO. The 40MHz frequency from the VCO is also fed to three programmable PLLs within IC2 which can be configured to produce a wide range of different frequencies. The outputs of the three PLLs are then buffered by IC4 and IC5, to provide a low impedance for BNC-socket output connectors CON2-CON4. If LK2 is fitted instead of LK1, CON2 will instead be fed with a disciplined (ie, more accurate) 1pps signal from the Micromite instead of the third PLL output. Circuit description Fig.2: complete circuit diagram for the Frequency Reference, showing the Micromite BackPack as a “black box” (the May 2017 article has the details). The 40MHz signal from VCO1 is fed to PLL IC2 which then produces the three programmable frequency output signals fed to CON2-CON4 as well as the signal fed back to RX/T1CK on the BackPack. This is divided down and compared to the 1PPS signal from the GPS module at pin 21 and the difference is used to change the voltage at the outputs of dual DAC IC1, which are combined and buffered by IC3 and then fed to the VCO’s control input. siliconchip.com.au Turning now to the full circuit diagram, Fig.2, you can see that there is a little more to it than described above. While oscillator VCO1 (TXEAACSANF-40) is in the oven, we have decided to use a temperature-compensated oscillator, for extra stability. IC1, the DAC controlling the VCO frequency, is an MCP4922 dual 12-bit type. We need fine control over the voltage fed to the VCO, so we can shift its frequency by very small amounts. Rather than use an expensive 24-bit DAC, we are instead averaging the two outputs of the dual 12-bit DAC using different resistor values, so that the pin 10 output gives fine control and the pin 14 output adjusts the frequency in larger steps. With this arrangement, we can vary the frequency of the VCO over its full range, in steps of around 60ppb. So that the VCO output is stable, the control voltage also must be very stable, so both the averaging resistors and the 2.5V reference for the DAC (REG2) are inside the oven, indicated by the shaded area on the circuit diagram. The combined DAC output is fed to an LMV641 op-amp (IC3) so that the VCO’s control input doesn’t load up the averaging resistors and cause the voltage to shift, and so that the VCO control input is driven from a low-impedance source to ensure it operates correctly. This is a high-precision, low noise, low power op amp. A 22pF capacitor at its input reduces unwanted noise. While IC3 has no gain, there is a 2kΩ resistor in its feedback path, so that the impedance seen by both inputs (pins 2 and 3) is the same. This is important since mismatched input impedances cause increased thermal drift in op amps and that is something we definitely do not want. DAC IC1’s reference inputs (pin 11 and 13) are fed with Australia’s electronics magazine October 2018  31 The Main Page provides buttons to access all the features of the Frequency Reference, as well as displaying the current state of the three outputs. The settings are organised into three main groups: Presets, Temperature (for tuning the oven’s operation) and VCO Trim (for manual adjustment of the VCO). The Presets page allows frequency settings to be copied and pasted. All the presets are saved to non-volatile storage, so are preserved during power cycles. 2.5V from REG2, a MAX6166A precision regulator with 5ppm/°C temperature coefficient. Since its temperature variation is within 1°C and that the VCO “pulling range” is ±5ppm, that means the influence of variations in REG2’s output should be no more than (2 x 5ppm) x 5ppm x 1°C which is a fraction of a part per billion. Also, REG2 is fed from a 2.7V regulated rail provided by REG1, itself a very stable 2.7V low-dropout (LDO) regulator, so its line regulation should be excellent. It should be apparent that we have gone to a lot of effort to ensure that the VCO’s output is extremely stable and only shifts when the micro wants it to! NPN transistor Q1, which provides heat for the oven, is connected directly across the 3.3V supply and so its dissipation is directly proportional to collector current, which in turn is related to its base current. The base current is determined by the voltage at output pin 10 of IC6, another MCP4922 dual SPI DAC, which uses a 2.7V reference from REG2, to avoid loading up REG1 unnecessarily. Q1’s 2.7kΩ base current-limiting resistor was chosen to keep the maximum dissipation in Q1 to a safe level. The Micromite sets the DAC output to control the temperature as measured by TS1, forming a closed control loop. The second DAC in IC6 is not needed for any function related to the oven so its output at pin 14 is connected to LED1 to vary its brightness as well as CON7, which is used for diagnostic purposes. The DS18B20 oven temperature sensor (TS1) sends its data to the Micromite pin 16 and its output is fitted with a 4.7kΩ pull-up resistor, as required for the Dallas 1-wire protocol. Phase-locked loop IC pins 12 (Y1) and 15 (Y2) are terminated to ground with 510Ω resistors, while the other four outputs are fed to their destinations via 510 /1.1kΩ dividers. Unfortunately, the CDCE906 data sheet was not specific about the output loading requirements and we found these resistor values necessary to provide reliable operation. The dividers only reduce the output signal swing by about 33% and since the chip runs off a 3.3V supply, that still gives a useful swing of around 2.2V peak-to-peak. Output Y4 is fed back to the RX pin (pin 12) on the Micromite via jumper LK1 as this is the only pin which can measure frequencies this high (as described below). Since this prevents the serial console from operating, LK1 has been provided; simply remove the jumper to access the serial console and re-insert it to allow normal operation. The other three remaining outputs at pins 16, 19 and 20 (outputs Y3-Y5) are fed to paralleled pairs of gates in hex inverter chips IC4 and IC5. These are 74ALVC14 devices, which are a modern equivalent to the 74HC14 hex schmitt trigger inverter. The difference is that these chips can operate at lower voltages (1.653.6V) and much higher frequencies (up to about 100MHz). They can also source or sink up to 50mA per output. So each pair can supply up to 100mA and they feed the outputs via 39Ω impedance-matching/currentlimiting resistors. A dedicated pair of inverters (IC5e/f) is also provided to buffer the disciplined 1pps output from pin 22 of the Micromite. Four of the twelve inverter stages are unused (IC4a/b/e/f), so their in- 32 Silicon Chip The PLL, IC2, is what allows us to have three customisable frequency outputs which are not simply integral fractions of the VCO’s 40MHz frequency. It is a Texas Instruments CDCE906 triple-PLL clock synthesiser IC, the only chip that is in a TSSOP (finepitch) SMD package as it is not available in a larger package. It has six programmable outputs but since it only has three internal PLLs, some settings are shared between them (we are using four of the six). It is controlled over an I2C bus at pins 9 and 10, which are connected to pins 17 & 18 of the Micromite and 4.7kΩ pullup resistors are fitted, as required by the I2C standard. If you are not familiar with PLLs, briefly, they consist of a voltage-controlled oscillator followed by a programmable divider. A phase comparator compares the frequency and phase of the divided output to the input frequency and provides negative feedback, to adjust the oscillator frequency until the output of the divider matches the input, thus providing a fixed ratio between the input and output frequencies. The 40MHz signal from VCO1 is fed into the three PLLs within IC2, via a 51Ω resistor, to provide IC2 with the expected 50Ω source impedance. Each PLL has a multiplier and a divider, which allows a vast number of ratios to be chosen, and in turn, a wide range of frequencies to be derived from the input clock. Each output can be programmed to take its input from any of the PLLs and the PLL frequency can be further divided down to give an even wider range of output frequencies. The two unused outputs of IC2, at Australia’s electronics magazine siliconchip.com.au Tuning the temperature settings can be done on this page, although we found the initial values we tried were quite good. You may need to raise the setpoint if your workspace consistently gets above 35°. The VCO settings are basic, but very useful. Changing the C Value (control value) allows the VCO to be manually tuned, perfect if you have an atomic clock source for calibration. A Status page is provided to give information about how the Frequency Reference is performing. In this case, no GPS module is connected, and the unit has fallen back to PLL-only mode. puts are tied to ground to prevent oscillation. The link arrangement to select the signal source for CON2 is a little more complex than was shown on the block diagram. A 5-pin header is used, which allows a jumper shunt to be placed over either pins 2 & 3 or 3 & 4 to feed either signal through to the central pin of the BNC socket. But since pins 1 and 5 are wired to ground, this gives you the option of feeding either or both signals to offboard connectors by placing a 2-wire plug over pin pairs 1 & 2 and 4 & 5. between a 3.3V or 5V power supply for the GPS module. We used the trusty old VK2828U7G5LF GPS module with onboard ceramic antenna, which can operate from either 3.3V or 5V. But we have provided the option since some constructors will prefer to use a module with an external antenna and in this case, you may need to choose a particular voltage to suit the module. Whichever module you use, make sure it has a TTL serial interface along with a 1PPS output pin. The NMEA output from the GPS module is a stream of serial text data which contains satellite information, including the time, date and location. The module also produces a 1PPS pulse, which is fed directly to pin 21 on the Micromite. Once the Micromite confirms from the NMEA data that a valid satellite fix has been achieved, it starts timing the 1PPS pulses in order to discipline the VCO. GPS module interface The GPS module’s serial TX and RX pins are wired directly to pins 9 and 10 on the Micromite so that the latter can receive NMEA serial data. A jumper is placed on LK1 to select Power supply You can fit either a mini USB (CON5) or micro USB (CON6) socket and power then comes from a 5V USB charger or similar. The 5V supply is fed directly to the Micromite BackPack, where it powers the LCD touchscreen and is regulated to 3.3V to power the Micromite chip. The 3.3V supply is then fed back to the Frequency Reference board, to power the remaining circuitry. The only component on the Frequency Reference which may draw directly from the 5V supply is the GPS module, and that’s only if you have selected the 5V option. Everything else runs from 3.3V, with Parts list – Precision Frequency Reference 1 double-sided PCB, code 04107181, 120mm x 55mm 1 Micromite BackPack V2 kit (described in May 2017) [SILICON CHIP Cat SC4237] 1 VK2828U7G5LF or equivalent GPS module [SILICON CHIP Cat 3362] 3 PCB-mount BNC sockets (CON2-CON4) [Jaycar PS0661] 1 UB3 Jiffy Box 1 40-way snappable pin header (GPS1,JP1,JP2,LK1) [Altronics P5430, Jaycar HM3212] 1 4-pin and 18-pin female socket 3 jumper shunts (shorting blocks) (JP1,JP2,LK1) 1 SMD USB mini-B (CON5) or micro-B (CON6) socket 3 M3 tapped 12mm long Nylon spacers 3 M3 x 20mm pan head machine screws 1 USB charger or similar power supply with cable to suit CON5/CON6 Parts for oven enclosure 2 100mm cable ties 2 bottle caps, film canisters, small foam cups or similar siliconchip.com.au Semiconductors 2 MCP4922 dual 12-bit SPI DAC ICs, SOIC-14 (IC1,IC6) 1 CDCE906 programmable PLL/clock synthesizer, TSSOP-20 (IC2) 1 LMV641 low-power op amp, SOIC-8 (IC3) 2 SN74ALVC14 hex schmitt trigger inverter, SOIC-14 (IC4,IC5) 1 DS18B20 temperature sensor IC, TO-92 (TS1) 1 MCP1700-2.7V voltage regulator, TO-92 or SOT-23 (REG1) 1 MAX6166AESA 2.5V voltage regulator, SOIC-8 (REG2) 1 3mm LED (LED1) 1 BC337 NPN transistor, TO-92 (Q1) 1 TXEAACSANF-40 VCTCXO IC, 4-SMD (VCO1) Capacitors (all SMD X7R, 3216/1206 size) 5 10mF 7 100nF 1 22pF Resistors (all SMD 1%, 3216/1206 size) 1 8.2M 1 10k 3 4.7k 1 2.7k 3 1.1k 6 510 1 220 1 51 Australia’s electronics magazine 2 2k 4 39 October 2018  33 Each output (CON2, CON3 and CON4) has its own control screen and allows setting of the output frequency by automatic seeking, manual adjustment of PLL parameters and from stored presets. The advanced screen gives direct control of the N, M and P dividers which are used by each PLL, as well as reporting whether the resulting PLL frequency is within the correct range. CON4’s advanced PLL control is restricted to modifying the P value, as N and M are locked to provide the 40MHz reference that is fed back into the Micromite. the 2.7V (REG1) and 2.5V (REG2) regulators being used only to provide the DAC reference voltages. Micromite pin 4 is wired to the LDAC-bar input of IC1 (pin 8), which is driven to ensure that the output voltages of both DACs within IC1 change at the same time. This prevents glitches from changes in the DAC output voltage being propagated to the input of VCO1. Communications with the DACs is simple since the micro only needs to send the new digital value over the SPI bus and the output voltages then change in response. The PLL IC has a more complex interface and is controlled by programming an array of internal registers which have various functions. Note that we have had to use the Micromite’s pin 26 since there are no free pins on the I/O header (pin 14 is a shared SPI pin so cannot be used). But the BackPack V2 uses pin 26 for the optional software LCD backlight control, so and the BackPack must be built with hardware (trimpot) backlight brightness control instead. Also, because the Micromite must use its internal TIMER1 feature to keep track of the frequency, as none of the other timers are fast enough to manage the 40MHz signal. Unfortunately, the TIMER1 pin is attached in hardware to the Micromite’s console RX on pin 12, so we have to shut down IC2 until it is needed. Using the console RX pin to capture the 40MHz signal from the VCO means that we can not use the console during normal operation, as this will cause the 40MHz signal to be swamped by signals from the console. To get around this, the two USB sockets on the board (CON5 and CON6) are used for power only. Link LK1 is provided so that you can still program the Micromite via the serial console and it is then shorted with a jumper for normal operation. Remaining components By default pin 1 of IC2 (S0/A0/CLK_ SEL) is configured to disable the six outputs when low. So we have fitted a 10kΩ resistor to ground, to make the outputs disabled by default. This pin is wired back to Micromite pin 24 so it can enable the PLL outputs by making that pin a digital output and setting it high. All ICs have 100nF bypass capacitors between their main supply pins and ground, for reliable operation, and all regulators have 10mF ceramic input bypass and output filter capacitors, except for REG2 which has internal compensation, so does not require a capacitor on its output. To minimise the noise from DACs IC1 and IC6 and jitter from PLL IC2, these three devices also have 10mF ceramic bypass capacitors near their supply pins, in parallel with the 100nF capacitors. Micromite BackPack The Micromite is responsible for coordinating the functions of all the components on the GPS Frequency Reference board. As mentioned earlier, the two DACs IC1 and IC6 use the SPI bus, which is on pins 3 (SPI OUT) and 25 (SPI CLK) of the Micromite. This same bus is also used on the BackPack for communications with the touchscreen but at different times, so the functions do not interfere. The Micromite’s digital output pin 5 is pulled low when the software sends an SPI command to IC1 and this is wired to its chip select (CS-bar) input. Similarly, Micromite pin 26 drives the CS-bar input of DAC IC6. 34 Silicon Chip Australia’s electronics magazine Controlling the PLL IC2’s software registers allow us to provide a comprehensive range of output frequencies, as we can set up internal multipliers and dividers to determine a wide range of internal PLL frequencies. We have the capability to read and write these internal registers; the read function is used only to verify that the writes have occurred correctly. Each PLL inside IC2 has a 12-bit ‘N’ divider and a 9-bit ‘M’ divider. But since the ‘N’ divider is in the feedback loop of the PLL, it actually has the effect of multiplying the frequency. It is the N/M fraction which determines the ratio between the PLL and input frequencies. Each of the six outputs also has a separate 7-bit ‘P’ divider. The N, M and P values are all integers (ie, whole numbers). In more detail, the incoming (nominally 40MHz) frequency is multiplied by N and then divided by M to give the PLL frequency, and the PLL frequency is divided by P to arrive at the output frequency. The PLL frequency must be in the range of 80-300MHz and the output frequency is limited to a range from 1-167MHz. Our output buffers limit the maximum usable frequency to around 100MHz. We configure the registers in IC2 so that PLL1 feeds into CON2, PLL3 feeds into CON3 and PLL2 feeds into both CON4 and back to the Micromite’s pin 12 frequency counter input. While PLL1 and PLL3 can be set to a wide range of frequencies, PLL2 is fixed to run at 160MHz, so that a ‘P’ divider of four gives us our 40MHz signal to feedback to the Micromite. That means, however, that CON4 cannot be set to produce just any frequency. But it can still be set to siliconchip.com.au The Seek page allows the frequency to be entered by a numeric keypad and provides MHz and kHz shortcuts to speed up entry of custom frequencies. If an entered frequency is too low for the Seek algorithm, a message box advises the fact and returns to the previous screen, preventing invalid results. When a valid Seek frequency is entered, the Micromite finds the nearest frequency which can be generated by the PLL and displays it so that it can be checked before being output. a number of different frequencies, ie, 160MHz divided by an integer between two and 127 (80MHz, 53.3MHz, 40MHz, 32MHz, 26.7MHz, …, 1.26MHz). While CON2 and CON3 can provide a much more flexible range of frequencies, the software actually has to do quite a bit of work to calculate the N, M and P values required to produce a specific frequency. After all, there are 268 million possible combinations [2(12+9+7)]. While it’s possible that there is no combination of values which will give a particular frequency that you want, chances are, if it is in the range of 10100MHz then the unit will be able to produce something very close (and you will be able to see on the screen what that frequency actually is). Since there are so many combinations of values, we had to carefully design an algorithm to find the best combination. It starts by determining what values of P are valid given the desired frequency. Because the PLL frequency must fall between 80MHz and 300MHz, this gives a fairly small range. For example, to produce a 40MHz frequency, P must be between two (80MHz PLL) and seven (280MHz PLL). Since the value of P is limited to seven bits, the highest valid value for P is 127. This is also what determines the lowest possible frequency that the PLL output can produce, which is 630kHz (80MHz÷127). Since the N and M registers have 12 and nine bits respectively, that puts an upper limit on their values at 4095 and 511 respectively. There is also a restriction that N must be greater than or equal to M, but given that the minimum PLL frequency is 80MHz, N must be greater than M to achieve this from a 40MHz source anyway. Since M has a smaller range of values, the algorithm iterates over the valid values of P and M, works out what the exact (decimal) value of N would need to be to produce the desired frequency, and then tests the next highest and lowest integer values to see how close they would be to our target frequency. As the iteration occurs, if a better match is found, it is stored. If an exact match is found, then no further searching need be done. Otherwise, it continues until all viable PLL setting combinations have been tested. Developmental Trials and Tribulations This project took some time to finish and like many of our more ambitious projects, we encountered a few stumbling blocks along the way. The final design is pretty close to the initial concept but we had to make a few refinements for it to work properly. As is typical, we are using all of the Micromite BackPack’s free I/O pins. The only way to get more I/Os would have been to use a board with an SMD micro but they are trickier to solder. In the end, the only real compromise we had to make was to use one of the console pins for I/O, making our debugging more difficult. This was necessary because the PIC32 only provides one input pin for each timer clock and only one of the timers is fast enough to neasure the 40MHz signal from the VCO. That pin just happens to coincide with the serial console transmit function. So we had to use the touchscreen to display debugging messages. That meant that we couldn’t see BASIC error messages. While the V2 BackPack has a USB console connector, unlike the one on Plus BackPack, this shares the same TX and RX pins, so that doesn’t help. The other major problems we had were with the PLL/Clock Synthesizer chip, IC2. It would randomly freeze up the I2C bus, sometimes locking up the Micromite and often just failing to respond at all. The I2C signals from the Micromite looked fine on an oscilloscope. siliconchip.com.au After many hours of probing, it became apparent that the I2C signals were OK but the chip couldn’t decode them because its ground was so noisy. We then noticed that the ground trace to the PLL/Clock Synthesizer chip had disappeared. This chip is closest to the Micromite header on the PCB and we had laid a short ground trace between them. But Altium Designer thinks it’s smarter than us; it saw that there were two different ground paths between those pins and decided to remove one of them as it considered it redundant. So the chip’s ground connection was via a long, circuitous path, hence the noise. We also found that IC2 operated much more reliably when the outputs were loaded up with around 1.5kΩ to ground and with a 50Ω series resistor to set the source impedance for the clock input; this was not mentioned in the CDCE906 data sheet, so we had to figure it out ourselves. Finally, we managed to simplify the design during development. We originally had two extra logic ICs, a divider to produce 20MHz and 10MHz signals from the 40MHz VCO output and another to select which of these three signals was fed to CON4. We later realised that all these functions could be done inside IC2, which would also allow for more frequency options for CON4. Since we had to revise the board to get IC2 to work properly, we eliminated the two extra ICs at the same time. Australia’s electronics magazine October 2018  35 Unfortunately, when this algorithm was implemented in BASIC, it took over a minute to complete, which is far too long. Thus, we had to write a CFUNCTION to speed up the process. Once the C code has been compiled, it generates PIC32 machine code which is inserted into and can be called from the BASIC program and this runs much faster. Our CFUNCTION version of the code takes less than one second to complete. As well as the N, M and P values, there are a number of registers which need to be set up for the PLL to operate as required. Most of these are initially set by “dumping” an array of data into the registers during the initialisation phase. After this, the N, M and P registers are about all that is changed by the program in the Micromite. Each PLL also has a one-bit flag which can be used to select either a high-speed mode (above 180MHz) or low-speed mode (below 200MHz). As each group of registers are updated, this is set to the appropriate value. As well as being able to enter a desired frequency and having the register values calculated for you, we decided to give users the option to enter the values of N, M and P manually. We found during testing that the restrictions stated in the data sheet on the PLL frequency are not hard-and-fast rules and that the chip is able to operate at frequencies outside the specified range. So our software does not enforce these rules for manually-entered values, although it does give a warning for combinations that would result in a PLL frequency outside the normal range. Other software considerations The remainder of the software is relatively straightforward. Updating the DAC outputs only requires selecting the chip, writing 16 bits, then deselecting the chip, so this only takes a few lines of code. Processing and parsing the NMEA data from the GPS module is a bit more involved, as we have to check that the GPS module has a proper fix before trying to discipline the VCO from the 1PPS signal (otherwise the 1PPS signal may not be accurate). This involves checking that we have received the “$GPRMC” sentence and that it has the value “A” at a certain point, and not “V”. Because it is not much more effort, 36 Silicon Chip we also decipher the GPS latitude, longitude, UTC time and date and display these values on the status page as confirmation that the GPS module is working correctly. Apart from the software algorithm for setting frequencies, we also had to create a second CFUNCTION to count the incoming 40MHz pulses from the VCO. This requires setting up the TIMER1 interrupt and an interrupt service routine to keep track of when the 16bit hardware counter overflows (the 32-bit timers are not able to operate at this high a frequency). The same routine also provides the disciplined 1PPS output by toggling pin 22 every twenty million received pulses. Thus, the accuracy of the output 1PPS signal is matched to the accuracy of the 40MHz oscillator, as they work in lockstep. We came up with an easy way to do this accurately. Rather than letting the 16-bit timer roll over at 65,536 as it would normally (ie, after 216 pulses), we set it to roll over after 62,500 pulses. Then, each time it rolls over, we increment another counter and once it reaches 320, that means that 20 million pulses (62,500 x 320) have occurred. So we only need to determine whether to toggle the state of pin 22 right at the start of the interrupt handler routine and since the delay will be the same each time, the duty cycle will be exactly 50% and the frequency will be exactly locked to the VCO. The TIMER1 interrupt handler also increments a 64-bit counter by 62,500 each time it is called. Then, when a 1PPS pulse from the GPS module is detected on pin 21, the TIMER1 value is added to this counter and that forms the timestamp which is stored in a circular buffer. The intervals between these timestamps are then fed into an algorithm to determine whether to adjust the VCO frequency and if so, in which direction and by how much, to keep it running at exactly 40MHz, or as close as is possible. User interface As is usually the case with projects using a complex touch interface, the code to display information and process user input is quite involved and, including font data, takes up about half of the BASIC source code. There are nine distinct interface screens, each quite different. The main Australia’s electronics magazine overview page has five buttons, one to access the “Settings” page, one for the “Status” page and one each to set up the three outputs. The current frequencies at CON2, CON3 and CON4 are also displayed on this screen. The output settings screen allows one of four preset frequencies to be loaded, or custom frequencies to be programmed, either using the automatic search algorithm or by manually setting the N, M and P divider values. A long press on one of the preset buttons allows the current output frequency value to be stored in a preset, while a short press loads that frequency immediately. The settings page allows the presets to be copied between the various outputs. The characteristics and response of the temperature controller and VCO adjustment algorithm can also be changed. The VCO’s control voltage can be changed manually, so you can directly adjust the VCO frequency if you have access to a high-precision frequency reference for calibration. The adjustment interval can be changed too. Longer adjustment periods mean more data is available to perform a more accurate adjustment, but it will take longer to settle. Physical construction Like many of our Micromite projects that use the LCD BackPack board, the Programmable GPS Frequency Reference is designed to fit into a UB3 jiffy box, making for a very compact piece of test equipment.The BNC connectors project out the side of the box, with the front panel dedicated to the touchscreen. Building this project is not particularly difficult, although there are a number of SMD parts. This is because IC2 is only available in an SMD (TSSOP) package, and we would have had to use a significantly larger box if we had used mostly through-hole parts. Except in the case of IC2, where we had no choice, we have selected mostly easyto-solder (larger) SMDs. The oven is made from just a few commonly available parts and does not take long. A few holes need to be drilled and cut into the plastic case but once you have built the PCBs, the rest is pretty easy. We’ll get into the construction and operating details in part two, next month. SC siliconchip.com.au