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Getting to grips with . . . Amplifier Stability & Compensation By NICHOLAS VINEN Elsewhere in this issue, we present the updated Ultra-LD Mk.3 Audio Power Amplifier Module. It has a new frequency compensation arrangement which helps it achieve even lower distortion than the Mk.2 version. In this article, we explain why amplifier frequency compensation is necessary and how it works. A MPLIFIER FREQUENCY compensation and stability are complicated topics about which books can be (and have been) written. These issues are important when designing or modifying audio circuitry, yet they are widely misunderstood. Here’s a 72  Silicon Chip brief summary of the relevant fundamentals. Negative feedback Stability and compensation relate to systems with negative feedback. But initially, let’s consider a power amplifier (or op amp) with its feedback network disconnected. We connect the inverting input to ground and apply a small signal to the non-inverting input, as shown in Fig.1(a). This is known as “open loop” operation. Nominally, the output voltage is the siliconchip.com.au difference in input voltages multiplied by the open loop gain which can be as high as one million (120dB). So a 1µV RMS input signal could result in a 1V RMS output signal. Amplifiers operated in this mode aren’t very linear which is another way of saying that they produce a significant amount of harmonic distortion. Also, this is far too much gain for most purposes and it varies from device to device. Closed loop operation If we feed a portion of the output signal back to the inverting input to apply negative feedback, the amplifier now operates in “closed loop” mode. The simplest method is to connect the output directly to the inverting input, as shown in Fig.1(b). Assume for a moment that we have an “ideal” op amp. It has zero input bias current, infinite open loop gain at all frequencies, zero output impedance and no phase shift (ie, no signal delay) from input to input. If we configure it as in Fig.1(b), whenever the input signal swings positive, the input voltage difference (“+” - “-”) becomes positive. This is amplified by a huge factor and so the op amp’s output swings towards the positive rail. However, it stops when the output voltage equals the input signal voltage, as the input voltage difference is then zero. Similarly, if the input signal swings negative, the input voltage difference becomes negative so the output voltage decreases, tracking the input signal perfectly. Hence, this circuit is known as a “voltage follower”. Now consider what happens with the same circuit if we use a real op amp, which has a very high but finite open loop gain, say 1,000,000 times. We then apply 0V DC to the non-inverting input followed by a step change to +1µV. Shortly after that change, the output swings positive, towards 1V (ie, 1µV x 1,000,000). But again, this positive slewing slows and then stops before the output gets to 1V because the inverting input voltage approaches that of the non-inverting input. The differential input voltage approaches but does not reach zero. The output (and thus the inverting input) settles at around 0.999999µV. We know this because the input voltage difference is then 0.000001µV siliconchip.com.au INPUT OUTPUT 1 V RMS 1V RMS OPEN LOOP GAIN = 120dB (1,000,000) A OP AMP IN OPEN LOOP MODE INPUT OUTPUT 1 V RMS 0.999999 V RMS EFFECTIVE INPUT VOLTAGE = 0.000001 V B OP AMP IN VOLTAGE FOLLOWER MODE INPUT OUTPUT 0.1 V RMS 27k EFFECTIVE INPUT VOLTAGE = 0.000001 V 0.999990 V RMS 3k C OP AMP WITH A NON -INVERTING GAIN OF 10 Fig.1: (A) an op amp operated in open loop mode, with a large but ill-defined gain and poor linearity; (B) an op amp configured as a voltage follower, operated in closed-loop mode with a gain of one; (C) closed loop operation with a fixed gain of 10 (the output accuracy and bandwidth are reduced compared to unity gain). INPUT SIGNAL FEEDBACK SIGNAL LOW FREQUENCY: PHASE SHIFT <180° – NO POLARITY INVERSION INPUT SIGNAL FEEDBACK SIGNAL HIGH FREQUENCY: PHASE SHIFT >180° – POLARITY INVERSION Fig.2: (top) at audio and low supersonic frequencies, amplifier feedback is in phase with the input signal and so negative feedback operates normally. At high frequencies (bottom), the feedback signal phase shift (delay) increases and eventually the feedback becomes positive, thus destabilising the amplifier. and this, multiplied by the open loop gain, is 1µV (ie, almost exactly the output voltage). So in reality, the output tracks the input with an error factor of 1 ÷ open loop gain. Higher open loop gain means better accuracy, explaining why ideal an op amp would have infinite open loop gain. AC signal non-linearities are also reduced by the same factor (at low July 2011  73 Bode Plot for Ultra-LD Mk3 Front-end, No Compensation Open Loop Gain Feedback (Gain=26dB) Phase Shift 100 Gain (dB) 0 30 80 60 60 90 40 120 20 150 0 180 -20 210 100 1k 10k 100k 1M 10M Phase (Degrees) 120 100M Fig.3: gain and phase (Bode plot) for a simple twostage differential amplifier circuit with no Miller capacitor. It is marginally stable with a gain of 20 and not stable at unity gain. Note that there are two different vertical axes. Frequency (Hz) frequencies), vastly improving the distortion performance compared to open loop operation. At higher frequencies, the distortion cancellation becomes much less effective for various reasons, some of which will be explained later. Fixed gain operation We can achieve a fixed gain by dividing down the output voltage before applying it to the inverting input. Fig.1(c) shows how the gain is set to 10. Now let’s imagine a +0.1µV step change is applied to the non-inverting input (one tenth that of the previous example). Again, the output swings positive. This time, the output reaches 0.999990µV before the inverting input settles at about 0.099999µV. Again the open loop condition is satisfied, ie, the input voltage difference (0.000001µV) multiplied by the open loop gain equals the output voltage, more or less. While the input voltage difference and output voltages are the same as the last example, now the output voltage is low by 0.000010µV or 10 times as much. That’s because the output error is divided by the feedback network and so cannot be compensated for as effectively. So for an amplifier with negative feedback, the DC input voltage error is constant and determined by the open loop gain (ignoring input offset and bias errors), while the output error factor is equal to closed loop gain ÷ open loop gain which in this case is 1/100,000. The inverse of this is the feedback factor, ie, open loop gain ÷ closed loop gain. A higher feedback factor means less DC voltage error and less AC signal distortion. Any distortion produced by the amplifier circuit is also divided by the closed loop gain before being fed back to the input for correction. Thus it is the feedback factor which determines V+ Rfb1 Q4 Vin+ Q1 Q2 VinQ5 Q3 V– Fig.4: a 3-stage amplifier schematic which is similar in principle to virtually all class B amplifiers and operational amplifier (op amp) ICs. The key component defining the closed-loop gain bandwidith is the compensation capacitor between the base and collector of Q3. 74  Silicon Chip Stability While the negative feedback is applied virtually instantaneously with respect to audio frequencies, there is a time delay involved. This is due to capacitance and inductance in the amplifier circuit as well as charge storage effects in the transistors. This fixed time delay (true to a first approximation) becomes a problem as the signal frequency is increased. You can see this effect in Fig.2. At low frequencies the delay in the feedback is slight but at a particular high frequency (and higher) the feedback is so delayed that it becomes positive feedback rather than negative. And if the feedback factor is greater than or equal to unity (ie, one) at this frequency, the output signal amplitude builds until it “bounces off” the supply rails (clipping). In other words, the amplifier becomes an oscillator. Typically, the phase shift (ie, the time delay) reaches 180° at a high frequency, around 1MHz or more, and the resulting oscillation causes a variety of problems. A marginally unstable amplifier can operate more or less normally but has increased distortion and dissipation. It will get much hotter than it should because of cross-conduction of the output devices. This occurs because at high frequencies, they can’t switch off fast enough. Apart from that, oscillation in a marginally stable amplifier can cause major RF interference. And if the oscillation is high enough, it will burn out the power transistors, even in the absence of an input signal. So clearly, any oscillation is bad. Preventing oscillation Vout Rfb2 how well distortion is cancelled by negative feedback. If we arrange for the feedback factor to fall with increasing frequency, so that it is below one at the frequency where the phase shift reaches 180°, there won’t be enough positive feedback for oscillation (but possibly still enough for overshoot and ringing in response to an input impulse). The open-loop gain and feedback factor fall with frequency anyway, because the same capacitances and charge storage effects that cause the phase shift also act as low-pass filters on the signal. But this isn’t usually enough to ensure stability. siliconchip.com.au Bode Plot for Ultra-LD Mk3 Front-end, 100pF Miller capacitor 120 Open Loop Gain Feedback (Gain=26dB) Phase Shift 0 100 60 80 60 60 90 60 90 40 120 40 120 20 150 20 150 0 180 0 180 -20 210 -20 210 100 1k 10k 100k 1M 10M 100M Gain (dB) 30 80 Phase (Degrees) Gain (dB) 100 Bode Plot for Ultra-LD Mk3 Amplifier, No Compensation 0 Open Loop Gain Feedback (Gain=26dB) Phase Shift 100 1k Frequency (Hz) siliconchip.com.au 100k 1M 10M 100M Frequency (Hz) Fig.5: Bode plot for the same circuit as Fig.3 but with a 100pF Miller capacitor added. As shown, the phase shift is increased and the open loop gain reduced at low frequencies. It is unity gain stable. To demonstrate this effect, we ran SPICE simulations on the Ultra-LD Mk.3 amplifier circuit described in this issue. To measure the open loop gain and phase shift, we modified the circuit by removing the input and output filtering and disconnecting the feedback loop. The base of Q2 is connected to ground while the test signal is applied to the base of Q1. We used a 0.1mV RMS signal with a DC bias of about +3mV, to make the output swing symmetrically about ground. The result of each simulation is a Bode plot. This is a graph with frequency on the horizontal axis and gain and phase on the vertical axes. One trace shows the open-loop gain in decibels (red) and the other, the phase shift in degrees (blue). We can judge the amplifier’s stability and bandwidth from these plots. (Bode plots are named after engineer Hendrik Wade Bode [1905-1982] who, while working at Bell Labs in the United States in the 1930s, devised a simple but accurate method for graphing gain and phase-shift plots). We have added a third line to each graph which represents the feedback factor for a closed-loop gain of 26dB (green), as this represents the operating conditions of the Ultra-LD Mk.3 (and many other power amplifiers). Because the plots are generated by simulation, they may not be 100% accurate. This is partly because we are not including parasitic capacitance and inductance effects. However, the results are quite similar to those of our prototype circuits, so we can draw useful conclusions, as long as we allow some margin for error. 10k 30 Phase (Degrees) 120 Fig.6: a Bode plot for a complete 3-stage power amplifier with no compensation. It is unstable even with a gain of 20 (26dB) due to the extra phase shift introduced by the output stage. For the output stage, we used transistor simulation models provided by On Semiconductor, which should be quite accurate. Results Fig.3 shows the Bode plot for the amplifier with no output stage buffer (Q10-Q15) and no compensation, ie, with the two 180pF 100V capacitors out of circuit. The output is taken from Q9’s collector. To explain further, Fig.4 shows the stripped down schematic of a typical power amplifier or op amp IC. Q1 & Q2 are the differential input transistors, Q3 (equivalent to Q9 in the Ultra-LD circuit) is the voltage amplifier stage and Q4 & Q5 are the output transistors. The critical component which largely defines the amplifier’s openloop frequency response and phase shift is the capacitor between base and collector of Q3. This is often referred to as a Miller capacitor, which is a reference to the Miller effect of capacitance between the grid and plate of a triode; after John Milton Miller, in a paper published in 1920. Getting back to Fig.3, the left vertical axis shows the gain in decibels and applies to the red (gain) and green (feedback) traces. The right vertical axis shows the phase shift in degrees and applies to the blue trace. The criterion for stability is that the amplifier gain must drop below unity before the phase shift reaches 180°. If the phase is more than 180° with a gain above unity, the amplifier will be unstable. For Fig.3, showing a closed loop gain of +26dB, the feedback factor reaches unity at around 45MHz while the phase shift does not reach 180° so this configuration appears stable. The open loop gain is around 120dB for low frequencies but rolls off from a -3dB point around 40kHz. Phase margin The “phase margin” is computed as 180° - phase shift, at the point where the feedback factor reaches 0dB. In this case it is 30°. The higher the phase margin, the more tolerant the circuit is of additional capacitance at its output, as this increases the phase shift and can destabilise the amplifier. 45° is generally considered sufficient; anything less is regarded as marginally stable. Compare this to Fig.5, which has been taken using a single 100pF Miller compensation capacitor between the base of Q8 and the collector of Q9. The open loop gain and feedback now begin to roll off at a much lower frequency, in fact from below 100Hz. The phase shift has been increased to around 90° below 50kHz (a result of the severe low-pass filter action of the Miller capacitor). Since the open-loop gain is now well below unity at the point where the phase shift reaches 180° (80MHz or roughly the same as for Fig.3), this configuration should be stable for any gain of unity or more. The phase margin is much healthier at around 60°. We can also measure the gain bandwidth for both cases, ie, the frequency at which the open loop gain reaches -3dB. It is around 22MHz for Fig.5 and the bandwidth for a closed loop gain of +26dB (20 x) is just above 1MHz. For the uncompensated circuit (Fig.3), July 2011  75 Bode Plot for Ultra-LD Mk3 Amplifier, Two Pole Compensation 30 100 80 60 80 60 60 90 60 90 40 120 40 120 20 150 20 150 0 180 0 180 -20 210 -20 210 Gain (dB) 100 100 1k 10k 100k 1M 10M 100M Gain (dB) 120 Phase (Degrees) 0 Open Loop Gain Feedback (Gain=26dB) Phase Shift 100 Open Loop Gain Feedback (Gain=26dB) Phase Shift 1k Fig.7: Bode plot for the same circuit as Fig.6 but with a 100pF Miller capacitor added. Once again, the phase shift is increased and the open loop gain is reduced at low frequencies. It is stable with a gain of 20 but not with unity gain. Adding the output buffer Now let’s add the output stage (Q10Q15) of the Ultra-LD Mk.3 module back into the equation. It’s a unity gain stage, ie, simply a current buffer. In an ideal world, it would have no effect on open loop gain or phase shift but this is not actually the case. Compare Fig.6 to Fig.3; the conditions are identical except for the presence of the output stage. It greatly increases the phase shift above 100kHz and so the frequency at which the feedback becomes positive has moved from 500kHz to about 200kHz. The open-loop gain rolls off at a slightly lower frequency, to a steeper slope. So with no compensation, the amplifier is even less stable with the output stage included, due to the additional signal delays. For Fig.7, we add a 100pF Miller capacitor again. This arrangement is very similar to the Ultra-LD Mk.2 76  Silicon Chip 100k 1M 10M 30 100M Frequency (Hz) Frequency (Hz) the gain bandwidth is above 100MHz. Theoretically, the bandwidth for a given gain setting is computed as gain bandwidth ÷ gain. In other words, as the gain is increased, the bandwidth is reduced, unless the compensation arrangement is changed. If we can change the compensation arrangement, we can adjust it to suit the closed-loop gain used, providing maximum bandwidth while maintaining stability. This is the main reason that some op amps provide pins for an external compensation capacitor (those with internal compensation are sometimes available in “decompensated” versions for use with higher closed loop gains). 10k 0 Phase (Degrees) Bode Plot for Ultra-LD Mk3 Amplifier, 100pF Miller capacitor 120 Fig.8: Bode plot for the complete amplifier with 2-pole compensation (compare this to Figs.6 & 7). It is also stable with a gain of 20 but open loop gain at audio frequencies is greatly increased at the expense of a higher phase shift above 3kHz. (August-September 2008) and many other power amplifiers. As with the earlier example (Fig.4), this pushes the feedback inversion frequency up but not as far; it is now around 5MHz. The open-loop gain roll-off is virtually identical to that in Fig.5 except for the sudden drop above 5MHz, due to the transition frequencies of the driver and power transistors (these are specified as 50MHz but that is the -3dB point; the roll-off actually begins at a lower frequency). As can be seen from the graph, for a gain of 26dB, the 100pF capacitor provides sufficient compensation, giving an excellent phase margin of around 80° and a bandwidth of about 1.5MHz. Interestingly, decreasing the closed-loop gain doesn’t yield as much additional bandwidth as we might expect, due to the output stage running out of steam at 5MHz. Two-pole compensation Now we get to the crux of the matter. In the Ultra-LD Mk.3 amplifier described in this issue, we are using a 2-pole compensation arrangement for the first time. This replaces the single Miller capacitor with two series capacitors and a resistor from the “centre tap” to Q9’s emitter. These capacitors can be different values but to simplify construction, they are both 180pF. For those unfamiliar with the term “pole”, in this case it refers to the effect of a single low-pass filter stage. Each low-pass filter pole adds a “knee” to the open-loop gain plot at the point where the frequency response rolls off. The pole also has an additional effect on phase shift. The simulated effect of the 2-pole arrangement is shown in Fig.8. Comparing this to Fig.7 we can see that the open-loop gain and feedback factor both roll off at a much higher frequency than with single pole compensation. The roll-off occurs after a peak, at about 3-4kHz. The gain then initially diminishes at 12dB/octave, rather than the 6dB/octave which is possible with a single pole. The result is that the feedback factor reaches unity at a similar frequency as for the single-pole scheme, despite the much higher corner frequency. The means a significantly greater feedback factor at higher frequencies in the audio band (in some cases by more than 30dB), allowing for better distortion cancellation. However, this benefit is limited by the additional phase shift introduced after the loop gain peak. The phase shift after this peak approaches 180° (nearly 90° from each pole), reducing the benefit of the additional feedback at high audio frequencies. However, our tests show that this scheme still results in much improved distortion cancellation up to 20kHz. The Bode plot does a good job of demonstrating how 2-pole compensation works. Below the gain peak, there is essentially no compensation, as the 2.2kΩ resistor shunts the feedback from Q9’s collector, via the 180pF capacitor, to the negative rail. Above the gain peak, the capacitor impedances drop so the 2.2kΩ resistance becomes less significant and both poles take effect. At very high frequencies, the capacitor impedances are so low that the resistor is taken out of the equation, giving the equivalent siliconchip.com.au Ultra-LD Mk.3 Output Clipping Behaviour, 2 x 180pF Capacitors Ultra-LD Mk.3 Output Clipping Behaviour, 2 x 100pF Capacitors 47.5 47.5 1 20 0 1 Potential (Volts) 30 Potential (Volts) Potential (Volts) 2 2 Output Base of Q8 Compensation Junction 30 1 20 0 1 0 0 -1 -1 150 200 250 300 350 400 150 200 Ensuring stability Looking at Fig.8, you may wonder why we can’t reduce the compensation capacitors somewhat, since we apparently have quite a large phase margin (around 70°) and there is a reasonable gap between the point where the feedback factor reaches unity (900kHz) and where the phase shift reaches 180° (5MHz). This would increase the open loop gain and reduce distortion. We performed this experiment on an Ultra-LD Mk.3 amplifier and examined its behaviour, in order to both confirm the accuracy of these simulations and to answer this question. The physical amplifier behaved essentially as predicted. It was stable during normal operation with ceramic capacitor pairs of 100pF, 120pF, 150pF and 180pF. As we changed the capacitors, the distortion at 20kHz (with 20Hz-80kHz measurement bandwidth) varied over a range of approximately 0.0045% (100pF) to 0.0055% (180pF). Things get interesting when we push the amplifier into clipping under load. With the 180pF capacitors (which we have selected for the final amplifier design), the waveform is simply clipped at the peaks where the output voltage reaches its furthest possible swing (see Fig.9). However, with the smaller capacitor values, there is parasitic high-frequency oscillation after siliconchip.com.au 250 300 350 400 Time (us) Time (us) Fig.9: the behaviour of the complete amplifier when driven into clipping with a low load impedance (3Ω). The supply rails are at ±48V to simulate a power supply under load. With 180pF compensation capacitors, there is a small step as it recovers from the clip but no oscillation. of a single 90pF compensation capacitor. As a consequence, the phase shift returns to a little over 90° and the gain slope drops to -6dB/octave before the feedback factor reaches unity. Potential (Volts) 40 40 Output Base of Q8 Compensation Junction Fig.10: with 100pF compensation capacitors, the amp­ lifier is stable during normal operation but not after recovery from clipping. Note how low the base drive for Q8 is during clipping, as the amplifier is operating in open loop mode. Recovery takes a finite period and triggers the oscillations which eventually die out. the recovery from clipping (Fig.10). This oscillation is at 450kHz or so and it is worse with smaller compensation capacitors. It significantly increases the output current consumption, due to cross-conduction in the output devices and as a result, we managed to blow the output stage fuses more than once during these tests. The reason that the amplifier behaves this way when it is normally stable is that once the clipping point has been reached, the amplifier is no longer operating in closed loop mode, as its feedback network is essentially out of action. For an amplifier with positive gain in clipping, the magnitude of the voltage at the inverting input (a divided down version of the output) has reached its maximum while the voltage magnitude at the non-inverting input continues to in­ crease. As can be seen from the figures, when this occurs for a positive excursion, the voltage from the base of Q8 to the negative rail drops dramatically (well below anything that’s experienced during normal operation), so that the output will swing as close to the positive rail as possible. But when the output voltage needs to drop, this means that the voltage at this point must dramatically increase in order to resume normal operation. This rapid change in base voltage, in combination with the compensation network from this point to Q9’s collector (which is also in a state that does not occur during normal operation), can trigger oscillations in a margin- ally stable amplifier. If you look very carefully at Fig.9, you can see that the amplifier’s output takes a short time to resume its normal slope after clipping; this same artefact is present in Fig.10 and the oscillation immediately follows it. Similar oscillations occur after the output clips to the negative rail (not shown). However, in this case, the base-emitter junctions in Q8 and Q9 limit the maximum voltage at Q8’s base to around 1.4V. As a result, the recovery is quicker and the oscillations are less severe. Note that while Figs.9 & 10 are produced by simulation, they bear an uncanny resemblance to what we saw on our scope while testing the real thing. That the SPICE simulator is able to reproduce this behaviour gives us confidence in its accuracy. Further research If you want to investigate stability and compensation yourself, the SPICE netlists, command files and component models are available as a download from the SILICON CHIP website (SPICE_Amplifier_Stability.zip). You will need SPICE simulation software (eg, ngspice or LTspice, both of which are available for free) and some experience with circuit simulation. We won’t detail how to run the simulations here. Once you figure it out, it is easy to change component values and configuration and then produce new Bode plots to gauge the effect of those changes on amplifier SC stability and feedback. July 2011  77