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A look at how Switchmode controllers work Ever wondered how switchmode regulator ICs work? Here’s everything you need to know but were afraid to ask. By NICHOLAS VINEN E LSEWHERE IN THIS ISSUE, we present the LED Dazzler, a 10W LED driver that uses switchmode regulation to control its output current. During the course of its design, we initially spent quite some time working on circuits based on a common switchmode controller IC, the UC3843 (or TL3843). There are significant advantages in using a controller IC such as the UC3843. You can use virtually any switching topology such as buck, boost, buck/boost, boost-buck, Cuk, SEPIC etc. The switching frequency, frequency response, current limit and other parameters can be customised to suit the application. Because you choose the switching devices and their configuration, it is possible to build a regulator that will deliver a lot of current (10A or more) or one which can handle high voltages, rather than being restricted to the specifications of a particular integrated regulator. But while the UC3843-series datasheet contains all the information necessary to understand its inner workings and thus build a circuit around it, the authors assume that the reader is fully familiar with the operation of switchmode regulators. Switchmode basics The main point to consider for any switching regulator is that the output voltage is typically controlled by the duty cycle of a Mosfet. The Mosfet is turned on and off rapidly and its duty cycle varies the output voltage because it siliconchip.com.au determines the ratio of switch on-time to off-time. The majority of switchmode regulators use a fixed frequency pulse width modulation (PWM) scheme. Others use a scheme where either the on-time or off-time is fixed and the other varies. Both methods allow control of the duty cycle but with the latter type, the frequency also varies. Fig.1 shows the functional block diagram of a typical switchmode controller IC (modelled on the UC3843), used here as part of a boost regulator. For boost regulators, with the switch off (ie, 0% duty cycle), the output voltage (Vout) is one diode drop below the input voltage (Vin). As the duty cycle increases, so does the output voltage. The practical upper limit depends on the load impedance but is generally around three to four times the input voltage. In short, when the switch is on, current flows from the input supply through the inductor and Mosfet and then to ground, and this stores energy in the inductor’s magnetic field. During this time, the diode (D1) is reverse biased, so load current is supplied by the output capacitor (C2). When the switch turns off, the inductor’s magnetic field collapses and the energy stored in it is fed via the diode to charge the output capacitor. Basic controller operation Let’s look at the big picture first. The IC’s internal oscillator (centre) generates a fixed frequency square wave. This sets the latch and, via the AND gate, drives a transisFebruary 2011  81 Fig.1: block diagram of a typical switchmode controller IC. It is shown here controlling a boost regulator circuit based on L1, D1 and an N-channel Mosfet. tor buffer that in turn drives the external Mosfet. In each cycle, the latch is reset at a point determined by voltage feedback (via VFB) and current feedback (via ISENSE). The later it is reset during each timing interval, the higher the duty cycle. The feedback voltage at the VFB pin is amplified by the error amplifier and then compared with the current feedback at ISENSE in order to determine when the latch is reset. The controller also includes a reference voltage which is used as an input to the error amplifier and also to provide the “under-voltage lockout” feature. Fig.2(a): simplified representation of a voltage mode regulator. The error amplifier drives a modulator to dervice a pulse width modulated (PWM) signal which is then filtered to produce a regulated output voltage. Fig.2(b): in this circuit, the modulator and inductor are replaced with a voltage-to-current converter. 82  S ilicon Chip This eliminates the inductor from the feedback loop, improving the regulator’s transient response. Feedback loop The simplest switchmode regulator operates in “voltage mode”, whereby the difference between the output voltage and the target voltage is amplified and filtered to determine the switch duty cycle. As the output voltage drops, the output of the error amplifier increases, driving the duty cycle up in order to compensate. Similarly, if the output voltage is too high, the duty cycle is decreased. Refer to Fig.2(a) for a simplified representation of a voltage mode regulator. The error amplifier drives the “modulator” which presents a square wave to the LC output filter by alternately switching its output between Vcc and ground. The duty cycle of this square wave is determined by the voltage at the error amplifier output. The main problem with this scheme is that there are three poles in the regulator’s frequency response. So what is a “pole”? Many readers will be familiar with the -3dB point of a low-pass filter. This is an example of a “pole”. For frequencies above that -3dB point (ie, pole) the response siliconchip.com.au Fig.3(a): block diagram of a modulator circuit. This controls the Mosfet switch using PWM, with the duty cycle determined by the control voltage input. just the output capacitor, which has one less pole than the LC filter that the voltage mode regulator uses. This results in better load regulation. The current feedback path includes an RC filter (RFILT and CFILT) to remove switching spikes. This adds a new pole but its corner frequency is high so it has little impact on load regulation. Another advantage of a current-mode regulator is that pulse-by-pulse current limiting is easy. If the output is short circuited, the inductor can quickly saturate, reducing its effective inductance and leading to excessive current being drawn from the input power supply. Since a current-mode regulator controls the current directly, the switch turns off early in such a situation. We can implement the voltage-to-current converter roughly as shown in Fig.3(b). This shows how the control voltage input determines the current through RLOAD. The current through RLOAD is converted to a voltage by RSENSE and fed to the comparator. The oscillator periodically turns the latch on, allowing current to increase through the load. As it does, the voltage across RSENSE increases. When this exceeds the control voltage, the latch is reset and the switch turns off. The current through the load then drops, until the next timing cycle. As can be seen from Fig.3(a) & Fig.3(b), the voltage-tocurrent converter is quite similar to the modulator, adding just a few components (such as a current sense resistor) and incorporating the inductor. Once the complete circuit is drawn, both regulation methods involve similar components and differ only in the details of the feedback network. Current-mode regulation Fig.3(b): the voltage-to-current circuit is similar to the modulator, the difference being that the control voltage now determines the average current through the load. of a low-pass filter drops off at a fixed rate. Of the three poles in the regulator circuit, two are from the LC (inductor/capacitor) output filter and one is from the compensation capacitor (CCOMP). Multiple poles mean a faster roll-off in the frequency response and this reduces the ability to compensate for sudden supply voltage or load transients. This situation is improved by the use of “current mode” regulation, which is the most common method used these days. By regulating the current being delivered to the output capacitor, rather than the voltage across it, the inductor’s pole is eliminated from the frequency response. Essentially, the inductor and controller together can then be considered as a variable current source. As shown in Fig.2(b), the modulator and inductor are replaced with a voltage-to-current converter, the inner workings of which are not shown. The filter is therefore siliconchip.com.au Essentially, current-mode regulation (as shown in Fig.1) works as follows. Voltage feedback is provided to the VFB pin of the controller via a resistive divider composed of R1 and R2. These are chosen so that the voltage at the VFB pin equals the reference voltage VREF (in this case 5V) when the correct output voltage level is reached. The difference between this feedback voltage and the reference voltage is amplified by the error amplifier. Since the error amplifier is inverting, its gain is set by external resistor R3 in combination with feedback resistors R1 and R2. The compensation capacitor CCOMP, which rolls off the voltage feedback response for stability, is connected in parallel with R3. The amplifier’s output voltage is attenuated and then applied to the inverting input of the comparator which controls the latch. Its non-inverting input is connected to the filtered voltage from the current sense resistor at the ISENSE pin. With this configuration, either an increase in output voltage or switch current will cause the comparator to reset the latch, reducing duty cycle. In practice, what happens is that over longer periods (as determined by the compensation arrangement), it is the output of the error amplifier that controls the switch duty cycle. Over shorter periods, because CCOMP limits the error amplifier’s rate of change, the duty cycle varies in order to keep a consistent peak current through RSENSE. Since a change in load current affects how much energy is left in the inductor’s magnetic field for the next pulse, this will have an almost immediate effect on the ISENSE voltage. This in turn causes a quick change in the duty cycle to compensate, keeping a relatively constant amount February 2011  83 of energy stored in the inductor at the end of each pulse. At the same time, the load transient has an effect on the output voltage and eventually CCOMP’S charge will change enough to cause some feedback, returning the output voltage to its correct level after the transient. Logically, this method results in superior regulation but it brings additional challenges. With current mode regulation, the duty cycle is inherently unstable when it goes above 50% unless slope compensation is used. Luckily. this is pretty easy to implement, as is explained later. For in-depth information on current mode regulation, see the following document: http://www.venable.biz/tp-05.pdf Controller details The oscillator which controls the switching frequency is similar to a 555 timer but it requires just one resistor (RT) and one capacitor (CT) to set the frequency and duty cycle. Capacitor CT is charged from a reference voltage (in this case VREF, 5V) via RT, until its voltage reaches a threshold relative to VREF. During this time, the output of the oscillator is high. Once the threshold is reached, the oscillator’s output goes low and CT is discharged by a current sink. This means that the discharge time is controlled mainly by the value of capacitor CT. So CT is chosen to give the desired off-time and then RT is chosen to give the desired on-time. The sum of these times is the timer period and this determines its frequency. The AND gate between the latch and output transistors allows switching to be disabled when the under-voltage lockout is in effect. It also ensures that the output is off during the oscillator discharge cycle, limiting the maximum duty cycle (which is necessary in some applications). In this example, the output of the AND gate controls a push-pull transistor pair which is suitable for driving a Mosfet gate. Some switchmode controllers have open collector outputs instead, for driving bipolar transistors. In some cases, there are two outputs that switch alternately to drive a transformer. The under-voltage lockout circuit works by dividing the supply voltage down and comparing it to the output of the internal voltage reference. Not shown is the comparator hysteresis. Typically, the voltage reference is connected to an external pin and can be used for other purposes too. The diodes at the output of the error amplifier allow the error amplifier to operate in linear mode when the inverting input to the comparator is at 0V. If the amplifier’s output reaches ground, it is subject to a recovery delay. This is most likely when a load transient causes the output voltage to spike. These diodes, in combination with the R/2R resistive divider, convert the wide swing of the error amplifier into a level between 0V and 1V (clamped by the zener diode at the comparator’s input). This matches the 0-1V range at the ISENSE pin. Rsense is chosen so that 1V is developed across it with the maximum allowable inductor current. If ever this is exceeded, because the inverting input of the comparator is clamped to a maximum of 1V, the switch will always turn off. Component selection Knowing how the controller IC works, you can design a circuit around it. However, selecting the component values can be difficult. Consider the feedback voltage divider comprising R1 and R2. The resistor ratio required is determine by the ratio between the desired output voltage and the IC’s reference voltage (VREF) but the values chosen also depend on the regulator’s minimum load requirement. Normally R2 is in the range of 1-5kΩ. This means the feedback divider will draw 1-5mA from the output (since VREF = 5V and VFB is regulated to VREF). If a higher value is used for R2, the output voltage could rise above the target level with little or no external load (eg, due to leakage through D1). The maximum duty cycle chosen depends on the regulator topology (boost, buck, etc), the maximum load current and the ratio of maximum output voltage to minimum input voltage. Once these are known, a value for CT can be determined. L1 and C2 are usually chosen once the switching frequency is known (as set by RT and CT). Normally, the time constant of the L1/C2 filter is set to no more than 1/6th of the switching frequency otherwise excessive duty cycle hunting can occur, resulting in sub-harmonic oscillation. Larger values for L1 and C2 generally result in reduced output voltage ripple but also worse load regulation. Large value inductors can be bulky, heavy and expensive. So for less ripple generally a larger capacitor (or several in parallel) is used. In high-current applications, a value of RSENSE which develops 1V may be impractical due to the required dis- into MOTORS/CONTROL? Electric Motors and Drives – by Austin Hughes Fills the gap between textbooks and handbooks. Intended for nonspecialist users; explores all of the widely-used motor types. $ 60 Practical Variable Speed Drives – by Malcolm Barnes An essential reference for engineers and anyone who wishes to or use variable $ 105 design speed drives. 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Satellite 84  Silicon Chip siliconchip.com.au Fig.4: slope compensation is necessary to ensure stability in a PWM current-mode regulator operating at high duty cycles. It involves coupling a ramp waveform into the feedback path and can be implemented in several different ways. sipation, so an amplifier can be inserted between it and the ISENSE pin (with RFILT/CFILT in its feedback network). This will introduce a delay, however, reducing the regulator’s phase margin and requiring increased compensation. The values for RFILT/CFILT are generally chosen for a corner frequency somewhat above the switching frequency. C1 should be as large as practical, in order to reduce current spikes through the supply wiring leading to the regulator. The remaining components to select are R3 and CCOMP, which determine the error amplifier gain and compensation. The error amplifier’s closed loop gain affects the regulator’s overall open loop gain. A higher overall open loop gain leads to better voltage regulation at the output but also must be rolled off at a lower frequency in order to ensure stability. Essentially, the higher the open loop gain, the less the permitted change in output voltage with load variations. Say the output voltage is 12V, with a feedback divider ratio of 2.4:1. A 24mV deviation in VOUT results in a 10mV deviation in VFB. If the error amplifier gain is 300, this results in a 1V swing at the comparator’s inverting input and therefore the regulator will vary the switching current between zero and the current limit. This suggests that a reasonable gain figure is of the order of 100. The open loop gain must fall below one at a frequency where the regulator phase shift is below 360° or else the system will become unstable. Calculating the exact phase shift of a regulator is a difficult and complicated task which involves analysing the properties of both the regulator and the filter components. If you are not well versed in feedback theory, the value for CCOMP can be determined empirically by increasing it until the regulator proves to be stable to load transients across the expected range of input voltages. However, this can be time-consuming. To select an initial value, calculate the value for CCOMP so that its impedance at one fifth the regulator’s switching frequency is no higher than R2’s. Slope compensation As mentioned earlier, current-mode regulators which can achieve duty cycles over 50% require slope compensation for stability. Slope compensation involves adding a siliconchip.com.au ramp signal into the feedback path, such that the current level required to turn off the switch drops towards the end of each pulse. Because the oscillator generates a sawtooth waveform at the RT/CT pin, we can use this for slope compensation. As recommended in the UC3843 datasheet, an NPN emitterfollower can be used to buffer this ramp waveform. The output of that amplifier is then resistively summed into the ISENSE feedback path. This compensation method (along with some other possibilities) is shown in Fig.4. This has the effect of raising the current feedback voltage later in each pulse and therefore resetting the latch earlier than it otherwise would be. In our LED driver project, we used capacitative coupling to inject the ramp signal into the feedback path. This has the advantage of removing the timing ramp’s DC offset from the slope compensation signal. In fact, our LED driver avoids the transistor buffer because the coupling capacitor is so small that it barely affects the oscillator frequency. No matter how the slope compensation is achieved, it helps to stabilise the duty cycle by providing some negative feedback. If the correct level of compensation is applied, hunting is kept to a low level across the entire duty-cycle range. An alternative to slope compensation is to use a fixed off-time scheme. This solves the same problems but does not need to be tuned for maximum effectiveness, as the slope compensation does. Conclusion Switchmode regulators are very common today, especially in battery-powered systems and devices such as computers, where multiple voltage rails are required. While the mathematics of regulator theory is daunting, design can be approached using a process of trial and error. A breadboard can be used for experimentation as long as the current involved is kept low (say, less than 1A). The only special components required are the controller IC, a Mosfet, a Schottky diode and an inductor. A good collection of resistors and capacitors is useful if you want to experiment with various compensation and gain settings. A controller IC and a handful of components can form the basis of a powerful and efficient DC/DC converter as long as the feedback loop is set up correctly. SC February 2011  85