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GPS-Based
Frequency Reference
Pt.1: By JIM ROWE
Need a source of very accurate 10MHz and 1MHz signals for
calibrating frequency counters, radio receivers and signal
generators? Here’s just what you need: a frequency reference
which is linked to the Global Positioning System (GPS)
satellites, to take advantage of their highly accurate on-board
caesium-beam “atomic clocks”.
N
OT TOO MANY decades ago, the
only way most people could generate reasonably accurate frequency
signals was by using a quartz crystal
oscillator. Following this, it became
possible to achieve slightly better accuracy by heterodyning a local quartz
oscillator with an HF radio signal from
one of the standard frequency and time
stations, such as WWV in the USA or
VNG in Australia.
By about 1980, even higher accuracy could be obtained by locking a
local quartz crystal oscillator with the
horizontal sync signals from one of the
national TV networks. That’s because
the networks used a master timing
clock that was locked to an “atomic
64 Silicon Chip
clock” based on either a caesium beam
or rubidium vapour oscillator.
The GPS system
The Global Positioning System
(GPS) became operational around
1990 and is run by the US Department
of Defense. By using this system as
a reference, it’s possible to generate
reference frequencies with extremely
high accuracy – even better than using
the previously listed methods.
That’s because each of the 22-odd
GPS satellites orbiting the Earth has
two caesium beam atomic clocks on
board. These are necessary to generate
the very accurate frequency and time
signals needed for accurate position-
ing. And since there are always at
least four GPS satellites “in view” at
any time from any point on the Earth,
this means that there’s always access to
an “ensemble” of about eight caesium
beam clocks to serve as a frequency
reference – provided you have the
right GPS receiving equipment, that is.
The only problem was that until
a couple of years ago, GPS receivers
were quite expensive. However, costs
have fallen quite dramatically since
then – so much so that handheld and
mobile GPS navigators are now everyday consumer items. In fact, low-end
navigators with colour LCD screens
are now down to around $400. Small
wonder they’re becoming so popular!
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The unit is housed in a plastic case and provides accurate 10MHz and 1MHz
reference frequencies via front-panel BNC sockets. A range of data can also
be displayed on the LCD, including UTC time and date and the receiving
antenna’s latitude, longitude and height above mean sea level (see panel).
with good-quality signals, though.
This means mounting a small active
GPS antenna in a clear area outside,
as high as possible so that it can get
an unobstructed “view” of the sky in
order to receive the satellite signals.
The antenna is connected to the
antenna input of the receiver using
a suitable length of good quality
50W coaxial cable. This delivers the
amplified 1.575GHz GPS signals to
the receiver and also feeds the active
antenna with DC power (provided by
the receiver).
In our case, we chose a Garmin
GA 29F flush-mount active antenna,
which costs about $90. This was
mounted on a plastic junction box and
fitted to the top of the author’s TV antenna mast (see photo). We also tested
a D-3856 antenna made by Australian
firm RF Industries, which also worked
well. This unit is available from Dick
Smith Electronics and Tandy outlets
for just $69.
Taken together, the GPS receiver
module and an active antenna
will set you back about $200. The
rest of the parts will probably be
around the $150 mark, so you
should be able to build the whole
shebang for about $350. This is
just a fraction of the price you’ll
pay for a commercially available
GPS-based frequency reference.
How it works
As you might expect, inside each
of these navigators is a complete GPS
receiver module. However you don’t
have to buy a navigator to get the receiver module, because they are also
available separately for use in other
equipment. And that’s just what we’ve
done here – use one of these “bare
bones” receiver modules as the heart
of this project.
Garmin GPS 15L
The GPS module we chose to use is
a Garmin GPS 15L, which is available
from local distributors for about $130.
It’s quite a tiny device, measuring just
46 x 36 x 8.5mm and weighing in at
only 14.1g. But don’t let the size fool
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you because there’s a lot packed into it.
Inside, there’s a complete 12-channel
GPS receiver which can track and use
up to 12 GPS satellites at once. And
it can provide a swag of GPS-derived
time, date, position and satellite status
information in serial RS-232C text
form – updated each second, no less.
It also provides a one-pulse-persecond (1PPS) output, where the
leading edges of the pulses are very
accurately locked to the UTC-derived
GPS timing system. It’s these pulses
that we mainly use in the reference, to
control the frequency of a local 10MHz
crystal oscillator.
For best performance, you do need
to feed the Garmin GPS 15L receiver
To get a handle on how it all
works, refer now to the block
dia-gram of Fig.1. Basically, the
frequency of the 10MHz crystal oscillator (top, right of Fig.1) is controlled
using a phase-locked loop (PLL). This
PLL, in turn, uses the very accurate
1Hz pulses from the GPS receiver
module as its reference. However, the
PLL configuration is a bit more complicated than normal, so let’s look at
this in greater detail.
Basically, the reason for the added
complexity is that it isn’t easy to control a 10MHz crystal oscillator using a
reference frequency as low as 1Hz – at
least not using a standard PLL. That’s
because with a standard PLL configuration, the oscillator frequency must
be divided by 10,000,000 (to get 1Hz),
to be compared with the reference
frequency in the phase comparator.
However, such a high division factor
involves a relatively long time delay
and this adversely affects the error
correction feedback, making it very
March 2007 65
generates a “phase error” pulse, the
width of which is directly equivalent
to the timing difference. One of these
phase error pulses is produced at the
start of each 1Hz GPS pulse and they
can vary in width from zero (when the
two signals are exactly in step) up to
a theoretical maximum of 20ms (when
the two signals are one period of 50kHz
out of step).
In practice, we use the PLL’s feedback loop to maintain a fixed phase
error of about 10ms (ie, halfway in the
range). This gives the PLL the widest possible control range, to ensure
reliable locking of the 10MHz crystal
oscillator.
Deriving the feedback voltage
A small active GPS antenna is
necessary to receive the GPS signals.
The author used a Garmin GA 29F
antenna. This was mounted on a
plastic junction box and fitted to the
top of an existing TV antenna mast.
difficult to stabilise the PLL.
To get around this problem, we
divide the 10MHz oscillator output
by a much smaller factor – only 200
times in fact. This is done in separate
divide-by-10 and divide-by-20 stages
using synchronous divider ICs, so that
we end up with 50kHz pulses which
have the timing of their leading edges
(L-H transitions) very closely synchronised with the leading edges of every
200th pulse from the 10MHz oscillator.
This means we have effectively
transferred the phase of the 10MHz
oscillator signal (averaged over 20ms)
to the 50kHz signal at the output of
the divide-by-20 divider. And it’s the
phase of this signal which we feed into
the second input of the phase comparator, where it’s compared with the
leading edges of the 1Hz pulses from
the GPS receiver module.
The phase comparator does exactly
what its name implies – it compares
the leading edge of each 1Hz GPS pulse
with the 50kHz pulse nearest to it and
66 Silicon Chip
OK, so how do we use the varying
phase error pulses from the comparator to produce an error correction feedback voltage for the 10MHz
oscillator? Well, what we do is use
the error pulses to control an AND
gate which then passes pulses from
a second crystal oscillator (running
at about 10MHz) to an 8-bit binary
counter. So as the error pulse width
varies, it allows a varying number of
these “about-10MHz” pulses to reach
the counter.
For example, if the phase error
pulses are 8.0ms wide, 80 pulses will
be gated through to the counter. And
if the pulses are 11ms wide, 110 pulses
will be fed through, and so on. So at the
start of each 1Hz GPS pulse, a burst of
“about-10MHz” pulses will be fed to
the counter, the number of pulses in
the burst being directly proportional
to the phase error.
The counter is actually reset at the
end of each 1Hz GPS pulse, so it counts
up from zero each time. At the output
of the counter we also have an 8-bit
latch and a simple digital-to-analog
converter (DAC) using a resistor ladder
network. After the end of each phase
error pulse, the latest error-proportional pulse count is transferred into the
latch, replacing the previous count.
As a result, the output of the DAC is
a DC voltage which varies in level each
second, according to the phase error.
So the phase error has been converted
into a varying DC error voltage.
Get the idea? When there’s a fixed
phase error of say 10ms, the counter
will have a count of 100 each time
and the DAC will have an output
voltage of almost exactly 1.953V.
This voltage will vary up or down in
steps of 19.53mV, as the phase error
pulses vary in width and the number
of “about-10MHz” pulses fed to the
counter varies up or down. Each of
the “about-10MHz” pulses fed to the
counter corresponds to a phase error
step of close to 100ns, so our phase
error-to-DC error voltage conversion circuit has a conversion gain of
19.53mV/100ns or just under 2mV
for every 10ns change in phase error.
Why two 10MHz oscillators?
By now, you are probably wondering why we go to the trouble of using
a second 10MHz crystal oscillator
to provide the 100ns pulses for the
phase error counter. Why not just use
the output of the main temperaturecontrolled 10MHz oscillator, at upper
right?
We use a second 10MHz oscillator
because this inevitably drifts in phase
compared with the main oscillator
and this introduces a small amount of
“dither” into the phase error counting
operation. The random noise introduced into the DAC’s output voltage
as a result of this dither allows the
PLL’s error correction to have a significantly higher resolution than if
we used pulses from the main 10MHz
oscillator.
The reason for this is quite straightforward. If we had used the pulses
from the main oscillator, the fact that
they would be locked to the 50kHz
pulses (and hence the phase error
pulses as well) would mean that the
DC error voltage could only ever
change in 19.53mV increments. This
corresponds to 100ns changes in phase
error. However, the dither introduced
by using the second oscillator means
that the average error voltage will
change in somewhat smaller increments. And that means that we can
maintain the main oscillator’s phase
locking to much closer than 100ns.
As shown in Fig.1, the DC phase error voltage from the DAC is fed through
a buffer to a low-pass filter stage based
on capacitor C1 and resistors R1 & R2.
The filtered error correction voltage is
then used to control the capacitance
of a varicap diode, to fine-control
the frequency and phase of the main
10MHz oscillator.
This unusual type of PLL system
is very effective when it comes to
phase-locking a 10MHz oscillator to
the GPS 1Hz pulses but it does have
a limitation. Because it divides down
siliconchip.com.au
Fig.1: the GPS-Based Frequency Reference uses a phase-locked loop (PLL) to control the frequency of a 10MHz
crystal oscillator (top, right). This PLL in turn is referenced to the very accurate 1Hz pulses from the GPS receiver
module. A PIC microcontroller decodes the GPS data, interprets the switches and drives the display module.
the oscillator frequency by only 200
times instead of 10,000,000, it’s just
as effective at phase-locking an oscillator at a frequency of 9.999800MHz
or 9.999600MHz, or 10.000200MHz or
10.000400MHz.
In other words, it’s capable at
phase-locking at frequencies that are
separated from 10.000000MHz by
exactly 200Hz or multiples of that
frequency difference. This means that
when you are setting up the frequency
reference, it’s very important to adjust
the free-running frequency of the main
crystal oscillator to within 100Hz
of 10.000000MHz. If you don’t, the
PLL may lock it to 9.999800MHz or
10.000200MHz instead of the correct
frequency!
Making use of the data
OK, that’s how the main part of the
GPS Frequency Reference works. The
only part we haven’t discussed yet
is the section down in the lower left
of the block diagram. This section is
functionally quite separate from the
main section. Its purpose is to make
use of the stream of useful data that
emerges from the GPS receiver module
siliconchip.com.au
each second, along with (but separate
from) those accurate 1Hz pulses.
This data is delivered as ASCII text
and appears at the module’s RS-232C
serial output port. It’s in the form of
coded data “sentences”, sent at a rate
of 4800bps (bits per second) using a
sentence format known as NMEA1083.
This format was first standardised by
the US National Marine Electronics
Association (NMEA) for information
exchange between marine navigation
equipment.
As shown in Fig.1, we use a programmed PIC16F628A microcontroller to “catch” and analyse this
serial data. The decoded data is then
feed it to an LCD module. Pushbutton
switches S1-S3 are included to allow
you to display some of the more esoteric information for a short time, as
required. Normally, the display simply
shows the current UTC time and date
(updated each second), plus the GPS
fix and PLL locking status.
The fourth switch (S4) forces the
PIC micro to send an initialisation
code command to the GPS receiver
module, to initialise it correctly if it
ever becomes “confused” (the GPS
receiver also contains a microcontroller, of course). In fact, the receiver
module has an RS-232C serial input as
well as the output, provided for this
very purpose. However, because this
initialisation is rarely required, S4
is not readily accessible like S1-S3.
Instead, it must be accessed through
a small hole in the front panel of the
project, using a small screwdriver or
probe tip.
Circuit details
Now that you have a basic understanding of the way the GPS-Based Frequency Reference works, we should be
able to work quickly through the main
circuit, to clarify the fine details. Fig.2
shows the main circuit while Fig.3
shows the associated display circuit
with its LCD module. The two connect
via a 16-way header cable.
In operation, the Garmin GPS 15L
receiver module (lower left of Fig.2) is
fed via an external active antenna. The
resulting GPS-locked 1Hz pulses are
on the grey wire of its 8-way output
cable and this goes to pin 5 of a 10way IDC line socket that mates with
CON7. The 1Hz pulses are then fed
March 2007 67
+11.4V
+
–
12V DC
INPUT
D5
D1 1N4004
A
K
D6
A
D7
K
A
VR1
GND
3 x 1N4004
1000 F
16V
3.3k
+5V
OUT
IN
K
A
CON5
REG1 7805
K
10 F
2.0k
CON6
+5V
TO DISPLAY BOARD
10
9
680
1
3
2
2
3
18
4
1
11
13
13
12
15
11
16
10
5
17
14
D4
Vdd
RA4
MCLR
RA3
RA1
IC1
IN
PIC16F628A
RB7
RB6
RB3
RB5
RB0
RB4
RB2
RA0
14
2 13
12
7
7
2
IC14c
~10MHz
5
5
4
180
1M
RS-232C
DATA
3
~10MHz
9
10
33pF
X2
10MHz
33pF
7
2
10k
6
GPS
1Hz
3
2
1
WHT
1
14
2
100pF
CET
PE
Vdd
CP
D3
D2
Q3
CP
Q3
D2
Q1
D1
Q0
11
IC9
12
Q2
D3
74HC161
D0
MR
Vss
1
8
13
14
11
IC8
12
Q2
74HC161
Q1
D1
D0
TC 15
CEP
TC 15
CEP
Q0
MR
Vss
1
8
IC11c
5
16
CET
16
Vdd
PE
13
14
RESET
COUNTERS
6
ORG
IC11a
4,6
BLK
100
4
+5V
9,10
GRN
CON3
5
GPS 1Hz PULSES
CON7
6
6
8
9
100nF
10
11
5
IC10
LM335Z
TEMP
SENSOR
ADJ
100nF
IC14f
IC14a
IC14e
GRY
Q1
BD136
HEATER
+5V
10
GARMIN
GPS-15L
RECEIVER
MODULE
C
TP2
IC14: 74HC04
7
IC14d
YEL
1
+
8
9
BLU
E
B
–
1
RED
6.8k
7
ERROR PULSE
8
EXTERNAL
ACTIVE GPS
ANTENNA
4
1nF
5
68
9
5
7
2
3.3k
6
RB1
Vss
100nF
10MHz
FROM IC3a
CLK 16
RA2
8
6
IC2
LM311
3
4.7 F
A
4
100nF
33k
2.2nF
2.2k
TP1
K
14
33
33k
5k
D2
1N4148
1k
IC11d
8
K
9
IC11: 74HC14
ERROR
PULSE
PHASE ERROR PULSE
WIDTH COUNTERS
A
IC11b
3
4
7805
SC
2007
GPS-BASED FREQUENCY REFERENCE
through Schmitt inverters IC11a and
IC11b which act as buffer stages. The
resulting 5V p-p pulses from IC11b
are then fed directly to pin 14 of IC7,
which is the phase comparator.
The 10MHz crystal oscillator that’s
68 Silicon Chip
MAIN BOARD
phase locked to the GPS pulses is
based on inverter IC3f and crystal
X1, plus varicap diode VC1 and several low-value capacitors. Its 10MHz
output is fed via inverting buffer stage
IC3b to CON1 and also via IC3c to di-
OUT
GND
IN
vider stage IC4. This stage divides the
signal by 10 and provides two 1MHz
outputs, at pins 12 & 15. The pin 12
output is then fed via inverter IC3d to
CON2, to provide the 1MHz output
signal at BNC connector CON2.
siliconchip.com.au
BD136
LM335Z
IC3f
13
ADJ
–
C
1
IC3b
3
5
CAPACITOR VALUE MAY
NEED TO BE CHANGED TO
SUIT CRYSTAL – SEE TEXT
E
2
12
+
B
IC3a
10MHz
TO IC1
1M
180
X1
10MHz
7
IC3: 74HC04
IC3c
6
+5V
100nF
VC2
3-10pF
4.7pF
NPO
22pF
NPO
15pF
NPO
TEMPERATURE
STABILISED
ENCLOSURE
2
IC4
74HC160
CP
8
K
100nF
9
7
10 16
PE CEP CET Vdd 12 9
Q2
MR
1
10MHz
47k
CON1
10MHz
OUT
100
4
Vss
TC
D0 D1 D2 D3
VC1
BB119
3
4
5
14
CON2
100
8
1MHz
OUT
IC3d
15
6
A
100nF
20
18
17
14
13
8
7
4
Vdd
D7
Q7
D6
Q6
D5
Q5
D4
Q4
IC12
74HC374
D3
Q3
Q2
D2
D1
Q1
19
16
15
12
9
6
5
20k
20k
10k
20k
10k
20k
10k
20k
10k
20k
10k
2
IC13a
4.7k
1
ERROR
VOLTS
CON8
+5V
9
7
10 16
PE CEP CET Vdd
MR
2
IC5
15
CP
TC
74HC160
8
Vss
D0 D1 D2 D3
3
4
5
6
11
IC13: LM358
1k
IC3e
5
6
10 F
IC13b
7
4
+5V
IC6: 74HC73
14
10MHz
(INV)
1
3
J
CLK
R
IC6a
K
1M
20k
Q
7
12
5
Q
13
10
1k
A
11
R
J
IC6b
Q
100nF
50kHz
9 TP3
CLK
K
8
Q
50kHz
+5V
+5V
IC11e
4
6
11
LADDER
DAC
K
100kHz
10
2
1M
10k
100nF
1
1M
LATCH
ENABLE
10
8
3
10k
20k
3 D0
CP
Q0 2
Vss OE
1
11 10
20k
10 F
100nF
1MHz
10MHz
+5V
5
3
D3
1N4148
Cin
14 Sin
100pF
GPS 1Hz PULSES
16
Vdd
INH
Vss
10 F
100nF
IC7
74HC4046
PC3o
15
8
ERROR
PULSE
PHASE
COMPARATOR
ERROR PULSE
1N4004
A
K
By contrast, the 1MHz pulse output
from pin 15 is fed to a second divideby-10 stage based on IC5 (ie, to the
CET input at pin 10). The resulting
100kHz pulse output from pin 15 of
IC5 is then fed to the J and K inputs of
siliconchip.com.au
1N4148
A
K
IC11f
BB119
A
12
13
K
flipflops IC6a and IC6b. Note that the
10MHz output from IC3c is used to
clock IC5, IC6a & IC6b, the latter two
stages via inverter IC3e. This ensures
that the counter and divider outputs
are correctly synchronised.
7
100
CON4
ERROR
PULSE
(INV)
Fig.2 (above): the complete circuit for
the GPS-Based Frequency Reference
minus the display circuitry (LCD &
LED indicators). The PLL-controlled
10MHz oscillator is built into a small
temperature-controlled oven to ensure
stability, with power transistor Q1
acting as the oven heater.
March 2007 69
Fig.3: the display circuit interfaces to the PIC microcontroller (IC1) in
the main circuit via IDC connector CON6. It includes the LCD module,
three LED indicators (LED1-LED3), switching transistors Q2-Q4 and four
pushbutton switches (S1-S4).
IC6a & IC6b are both are wired for
divide-by-2 operation. The 50kHz
pulses from the Q output (pin 12) of
IC6a are fed to the Cin input (pin 3) of
phase comparator IC7, for comparison
with the 1Hz GPS pulses on pin 14
(Sin). Note that these 50kHz pulses
have their rising edges closely aligned
with the rising edge of every 200th
pulse from the 10MHz oscillator.
The phase error pulses emerge from
pin 15 of IC7 and are fed directly to the
clock gating inputs of 4-bit synchronous counters IC8 and IC9 (74HC161),
70 Silicon Chip
which together form the 8-bit phase
error pulse width counter. This is done
because the AND gate shown in Fig.1 is
actually inside the two counter chips,
rather than being a separate device.
The “about-10MHz” clock oscillator
used by the error counter is based on
crystal X2 and inverter stage IC14c.
Its output is buffered by IC14a & IC14f
and fed to the clock inputs (pin 2) of
the two counters. The eight output
bits from the two counters are then
fed to the data inputs of IC12, the octal
latch. Its outputs are used to drive the
resistive-ladder DAC (digital-to-analog
converter).
In practice, this counter-latch-DAC
sub-circuit is arranged so that it performs a new count of the phase error
pulse width at the start of every 1Hz
pulse from the GPS receiver module.
The sequence is as follows: on the
falling edge of each 1Hz pulse (100ms
after the start), the counters are reset
by a very short pulse on their MR-bar
pins (pin 1). These short reset pulses
are derived from the 1Hz pulses at the
output of IC11a. The 1Hz pulses are
differentiated using a 100pF capacitor
and 1kW resistor and fed to the MR-bar
pins of IC8 and IC9 via IC11c.
The two counters begin counting
when the phase error pulse from IC7
arrives at their CEP pins (7). This allows them to count the “about-10MHz”
pulses which are fed to their CP (pin
2) inputs via buffer stages IC14a and
IC14f. Counting continues until the
end of the phase error pulse and then
stops. Another very short pulse, this
time derived from the falling edge of
the phase error pulse signal and applied via IC11e to pin 11 of IC12, then
transfers the count into IC12’s latches,
replacing the previous count.
As a result, the DC output voltage
from the DAC changes in response to
the new count. The counters are then
reset again at the end of the 1Hz GPS
pulse, ready for the next sequence.
The varying DC error voltage from
the DAC is fed first through buffer
stage IC13a and then to a low-pass
loop filter which is formed using a 1kW
resistor (R1 in Fig.1), a 10mF capacitor (C1) and three 1MW resistors (R2).
From there, the filtered error voltage
is then fed through IC13b to become
the automatic phase correction (APC)
voltage. This APC voltage is applied
to varicap diode VC1 which varies its
capacitance accordingly.
As previously stated, VC1 forms part
of the 10MHz crystal oscillator circuit
and its capacitance variations bring
the oscillator into phase lock. Trimmer
capacitor VC2 and its parallel 4.7pF
capacitor are used to initially adjust
the oscillator so that its free-running
frequency is within 100Hz of 10MHz
– ensuring that the PLL locks correctly
to this frequency.
Temperature stabilisation
OK, so that’s the basic PLL section
of the GPS-Based Frequency Reference
circuit. By now, though, you’re probsiliconchip.com.au
Fig.4: here are the two outputs provided by the Garmin
GPS 15L receiver module. The upper trace (yellow)
shows one of the extremely accurate 1Hz pulses, while
the lower (purple) trace shows the start of the RS-232C
data stream giving UTC time and date, latitude and
longitude, etc. Note that the frequency reading on the
bottom line should read exactly 1.000000Hz; the actual
reading shows the scope’s measurement error.
ably wondering about the function of
comparator IC2, transistor Q1 and the
LM335Z temperature sensor (IC10).
What are they for?
These parts are used to achieve
temperature stabilisation of the main
10MHz oscillator crystal (X1), varicap
diode VC1 and its series 15pF capacitor. In practice, these components are
housed in a “mini oven” to keep
the temperature constant. This oven
includes a small TO-220 heatsink
to which is attached the crystal, the
LM335Z temperature sensor and a
power transistor (Q1). It’s basically
an insulated enclosure made from a
cut-down 35mm film canister which
is lined inside using expanded polystyrene.
The construction of this mini oven
will be described next month. All
you need to know for now is that
IC10 (LM335Z) is mounted inside
the enclosure to sense the internal
temperature.
Basically, the voltage across IC10
is directly proportional to its temperature (in Kelvins) and this voltage
is applied to the non-inverting input
of comparator IC2. IC2’s inverting
input is fed with a reference voltage
of close to 3.15V, derived from a voltage divider (2kW & 3.3kW) across the
regulated 5V supply rail. As a result,
IC2’s pin 7 output switches high when
the temperature sensor’s voltage rises
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Fig.5: shown here are the leading edge of the GPS
1Hz pulses from the receiver module (upper yellow
trace), and the inverted error pulse from the Frequency
Reference’s phase detector (lower purple trace), when
the PLL is locked with a fixed phase error of 11.54us.
The jitter visible on the trailing edge of the error pulse
is normal and is caused by noise, GPS propagation
variations and so on (see text).
slightly above 3.15V and switches
low when the sensor’s voltage falls
somewhat below this level (depending on the hysteresis applied to the
comparator).
IC2 is used to control power trans
istor Q1, which is used here purely as a
heater. This transistor is attached to the
finned heatsink which forms the frame
of the mini oven, so when it conducts
it generates heat to increase the temperature. As a result of the feedback
provided by IC10, the temperature
inside the mini oven is maintained
Specification Summary
(1) This unit is a low-cost frequency and time reference based on a Garmin
GPS 15L receiver module. It is able to control the frequency of a local
10MHz crystal oscillator by reference to the very accurate 1pps (1Hz)
pulses broadcast by GPS satellites (referenced back to UTC as maintained
by the USNO). This allows the frequency of the local 10MHz oscillator to
be controlled to within about 0.2Hz averaged over a 30-second period and
even more tightly when averaged over a longer period such as 30 minutes.
(2) The built-in 10MHz reference crystal is housed in a small temperature
stabilised enclosure or “mini oven”. Buffered 10MHz and 1MHz outputs are
provided for external use. Buffered outputs are also provided for the 1Hz
GPS pulses and the phase error signals from the internal phase-locked
loop (PLL) used to control the 10MHz oscillator. The error signals allow
the user to log instantaneous phase error in the PLL, if this is desired for
traceability.
(3) The unit provides a continuously updated display on an LCD module,
showing UTC time and date, GPS fix and PLL lock status information.
It also allows optional short-term display of receiving antenna latitude,
longitude and height above mean sea level, plus the number of satellites in
current view and their reception quality.
(5) The complete reference operates from 12V DC, which can be from a
battery or a mains power supply. Average current drain is approximately
340mA, while peak current drain is about 420mA.
March 2007 71
A Few Facts About GPS
The GPS satellite network is
controlled and operated by the US
Department of Defense (US DOD).
Currently there are between 22 and
24 GPS satellites orbiting the Earth
at a height of 20,200km, in six fixed
planes angled at 55° to the equator.
Each satellite orbits the Earth
in 11 hours 58 minutes – ie, about
twice each day. This means that at
least four satellites are within “view”
of a given GPS receiver at almost
any time, wherever it is located
(providing it has a clear sky view).
The GPS satellites broadcast
pseudo-random spread spectrum
digital code signals on two UHF
frequencies: 1575.42MHz (known
as “L1”) and 1227.6MHz (“L2”).
There are two different code signals broadcast: the “coarse acquisition” or C/A code, broadcast on L1
only, and the “precision” or P code
broadcast on both L1 and L2. Most
commercial GPS navigation receivers process only the L1 signal.
Each GPS satellite carries either
caesium-beam or rubidium vapour
“atomic clock” oscillators, or a
combination of both. These are
“steered” from US DOD ground
stations and are referenced back to
How Accurate Is It?
What kind of frequency accuracy
can you get from this DIY GPS reference? Well, the 10MHz output is
accurate to within 0.2Hz, averaged
over a 30-second period. It’s even
more accurate when averaged over
a longer period, such as 30 minutes
or an hour.
The accuracy of the 1MHz output
is the same in relative terms, since
it’s derived from the 10MHz output
by frequency division. So it’s quite
reasonable to describe the nominal
frequency accuracy as within two
parts in 108 – considerably better
than a free running crystal oscillator,
and good enough for most frequency
calibration purposes.
Coordinated Universal Time (UTC),
as maintained by the US Naval
Observatory (USNO) – itself kept
within 100ns of UTC as maintained
by the US NIST. This ensures they
provide an accurate reference for
both the carrier frequencies and the
code signals from each satellite.
Although the GPS network
was designed mainly for accurate
terrestrial navigation, the high
frequency and time accuracy of
the signals from the satellites has
made them very useful as a reference source for frequency and time
calibration.
at very close to 42°C (315K) – within
about ±1°, in fact. The exact temperature can be adjusted over a small range
using trimpot VR1.
RS-232C data
The RS-232C data from the GPS
receiver module emerges on the yellow lead and is connected (via the IDC
line socket) to pin 2 of CON7. From
there, it’s fed through inverting buffer
IC14e to the RB1 input (pin 7) of PIC
microcontroller IC1, which is used to
process the serial data.
Similarly, the RS-232C serial input
for the GPS receiver module is its blue
lead and this goes to pin 1 of CON7. As
a result, initialisation commands from
the micro’s serial output (RB2, pin 8)
are fed to the module via inverting
buffer IC14d.
The phase error pulse from IC7 is
also fed to the RB3 input (pin 9) of IC1,
so that the micro is able to monitor
whether or not the PLL is maintaining lock.
Display circuit
The rear panel carries BNC sockets for the antenna and for the GPS 1Hz
and phase error pulse outputs, plus an RCA socket for the phase error
voltage. It also provides access to the DC power socket.
72 Silicon Chip
The display circuit (Fig.3) interfaces
to the main circuit via connector CON9
and includes the 2-line x 16-character
LCD module – which is directly driven
by microcontroller IC1 – plus its contrast control VR2.
In addition, there are the four control switches (S1-S4) plus three status
indicator LEDs (LED1-LED3), in turn
driven by transistor switches Q2-Q4.
Note that Q2 & Q3 (and thus LED1 &
LED2) are controlled by the micro itself
(via RA1 & RA2), whereas Q4 (LED3) is
siliconchip.com.au
GPS Frequency Reference: Parts List
1 ABS instrument case, 158 x 155
x 65mm
1 Garmin GPS 15L GPS receiver
module
1 external active GPS antenna to
suit – see text
1 PC board, code 04103071, 142
x 123mm
1 PC board, code 04103072, 144
x 58mm
1 16x2 LCD display module,
Jaycar QP-5516 or QP-5515
2 T0-220 heatsink, PC-mount
(Jaycar HH-8516)
3 SPST PC-mount snap-action
pushbutton switches (black)
1 SPST PC-mount mini
pushbutton switch
2 10MHz quartz crystals, HC-49U
package
4 PC-mount BNC sockets (CON1CON4)
1 PC-mount 2.5mm concentric
DC socket (CON5)
2 16-pin IDC line sockets
2 PC-mount 16-pin IDC header
plugs (CON6, CON9)
1 10-pin IDC line socket
1 PC-mount 10-pin IDC header
plug (CON7)
1 PC-mount RCA socket (CON8)
1 Panel-mount BNC-BNC malemale adapter
2 8-pin IC sockets, machined clip
type
4 14-pin IC sockets, machined clip
type
5 16-pin IC sockets, machined clip
type
1 18-pin IC socket, machined clip
type
1 20-pin IC socket, machined clip
type
3 M3 x 15mm tapped spacers
2 M3 x 6mm machine screws,
round head
7 M3 machine nuts
3 M2 x 25mm machine screws,
round head
4 M2 x 12mm machine screws,
round head
7 M2 machine nuts
7 M2 flat washers and star
lockwashers
1 7x2 length of DIL pin header
strip
7 1mm PC board terminal pins
1 35mm film canister, 34mm dia.
x 34mm long
2 cable ties
1 5kW horizontal mini trimpot
(VR1)
1 10kW horizontal mini trimpot
(VR2)
driven by the 1Hz pulses from the GPS
module via IC11b. The microcontroller
also scans the switches. As stated, S1S3 are pressed to display specialised
data on the LCD, while S4 initialises
the GPS receiver module.
tary voltage drop to reduce the power
dissipation in 3-terminal regulator
REG1, which delivers a regulated +5V
rail to power most of the circuitry. The
only sections driven directly from the
unregulated +11.4V input are comparator IC2 and heater transistor Q1
in the mini oven.
Power supply
Power for the circuit is derived
from an external 12V DC supply (eg,
a plugpack rated at 500mA or more).
This is applied via power connector
CON5 and diode D1 which provides
reverse polarity protection.
Diodes D5-D7 provide a supplemensiliconchip.com.au
Semiconductors
1 PIC16F628A microcontroller
programmed with
GPSFrqRF.hex (IC1)
1 LM311 comparator (IC2)
2 74HC04 hex inverters (IC3,IC14)
2 74HC160 synchronous decade
counters (IC4,IC5)
1 74HC73 dual flipflop (IC6)
1 74HC4046 phase comparator
(IC7)
2 74HC161 synchronous 4-bit
counters (IC8,IC9)
1 LM335Z temperature sensor
(IC10)
1 74HC14 hex Schmitt trigger
(IC11)
Other signals
That’s about it for the circuit description, except to note that various
useful signals (in addition to the main
10MHz and 1MHz outputs) are brought
out of the frequency reference to allow
1 74HC374 octal D-type flipflop
(IC12)
1 LM358 dual op amp (IC13)
1 7805 +5V regulator (REG1)
1 BD136 PNP power transistor
(Q1)
3 PN100 NPN transistors (Q2-Q4)
1 5mm green LED (LED1)
1 5mm red LED (LED2)
1 5mm orange/yellow LED (LED3)
4 1N4004 diodes (D1,D5-D7)
3 1N4148 signal diodes (D2-D4)
1 BB119 varicap diode (VC1)
Capacitors
1 1000mF 16V RB electrolytic
4 10mF 16V RB electrolytic
1 10mF 25V tantalum
1 4.7mF 25V tantalum
11 100nF multilayer monolithic
ceramic
1 2.2nF MKT metallised polyester
1 1nF MKT metallised polyester
2 100pF NPO ceramic
2 33pF NPO ceramic
1 22pF NPO ceramic
1 15pF NPO ceramic
1 4.7pF NPO ceramic
1 3-10pF N470 trimcap (white)
Resistors (0.25W, 1%)
5 1MW
1 2.2kW
1 68kW
1 2kW
1 47kW
3 1kW
2 33kW
1 680W
1 22kW
3 330W
9 20kW
2 180W
10 10kW
4 100W
1 6.8kW
1 68W
1 4.7kW
1 33W
2 3.3kW
its operation to be monitored.
First, the very accurate 1Hz GPS
pulses are brought out via IC11d and
CON3. Second, an inverted version
of the phase error pulse from IC7
is brought out via IC11f and CON4.
And finally, the unfiltered DC error
voltage from IC13a is brought out via
CON8. Either of the last two signals
can be used for logging the reference’s
operation.
That’s all we have space for this
month. Next month, we’ll show you
how to build it and describe the setting
SC
up and adjustment procedures.
March 2007 73
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