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This view shows the completed Poker Machine with an 8888 winning jackpot number displayed. The small 7-segment LED displays show the payout. Build Your Very Own Poker Machine Got a gambling habit? Losing thousands? Then rush out and buy the bits for this poker machine. You can play to your heart’s content and never lose your shirt. You can even invite all your friends to play and they won’t lose their shirts either. Design by ANDERSSON NGUYEN With the abundance of poker machines available in clubs, pubs, casinos and various gaming rooms, many of us would have come in contact with one at some time in our lives. This project lets you build your very own 4-digit poker machine, utilising super large 7-segment displays. The circuit 36  Silicon Chip also has a score board to let you keep track of your winnings. In addition, the circuit boasts flashing LEDs to indicate the winning combinations (see Table 1). The points given for each winning combination can also be seen in Table 1. With any four of a kind winning combination, the decimal points of all the super large 7-segment displays light up consecutively, giving a chase effect. Four zeros or four 8s will result in all four digits flashing. Clearly, that’s cause for celebration and while you won’t have won a fortune you won’t lose it later in the session either. The only other hobby poker machine circuit presently available is featured in the Dick Smith Electronics publication “Fun Way into Electronics” Volume 3. That circuit involves only two digits and is not nearly as complicated as the one presented here. This circuit gives the hobbyist an appreciation of how both digital circuits and the one-armed bandit works. This Poker Machine consists of two large PC boards sand­wiched together. The top board contains all the 7-segment dis­plays and their driving circuit while the lower board contains all the counters. Circuit details Because it is so big, we have had to split the circuit diagram into two sections and even then, it takes up the best part of four pages in the magazine. Fig.1 is the circuit of the main board and includes the counters and magnitude comparators, while Fig.2 is the circuit of the display board. While the whole circuit appears extremely complicated at first glance the majority of it consists of repeating units. In explaining the circuit operation we will need to jump from Fig.1 to Fig.2 and back again so here goes. Let’s start with Display 1 (DIS1) which is shown on Fig.2 but is driven by IC1, a BCD to 7-segment decoder/driver, on Fig.1. There is no need for current limiting resistors since each segment consists of four LEDs in series and the total supply voltage is only 9V. The BCD input to IC1 is derived from one section of IC2, a 4518 dual BCD (binary coded decimal) counter. The clock pulse to pin 1 of IC2 (CK1) Table 1: Winning Combinations Combination Type Examples Credits 8 4 2 1 4514 Decoded Outputs Comparators Input To 4514 LED Lit XXYZ 1 0 0 0 1 1 1 Pair YXXZ 1 0 0 1 0 2 1 Y ZX X 1 0 1 0 0 4 1 Pair In A Pair XYYZ 10 1 0 1 0 10 2 Two Pair XXYY 100 0 1 0 1 5 3 XYXX 1000 1 1 0 0 12 4 XXYX 1000 1 0 0 1 9 4 XXXY 10000 0 0 1 1 3 5 YXXX 10000 0 1 1 0 6 5 XXXX 100000 1 1 1 1 15 6 8888 +1000000 1 1 1 1 15 8 0000 + 10000000 1 1 1 1 15 8 Three Of A Kind Triple Four Of A Kind* * B onus comes from IC11, a 4046 phase locked loop which is being used simply as a VCO (voltage-controlled oscilla­ tor). R2 & C1 set the frequency range. C2 & R3 form an RC circuit such that the voltage input to pin 9 of IC11 varies with time. As the voltage at the resistor-capacitor junction decreases, Fig.1 (following page): this is the circuitry for the main board. It may look complicated but it mostly consists of repeating blocks. BELOW: the circuitry is built on two PC boards – a main board and a display board. The full construction details will be published next month. November November 1998  37 1998  37 38  Silicon Chip November 1998  39 so does the oscillator frequency. This makes the frequency high to begin with and then reducing, to give the effect of slowing rolling barrels of a poker machine. Transistor Q9 serves to discharge the 100µF capacitor C2 every time the Play switch is activated, so that the 40  Silicon Chip VCO output is running at the highest set frequency with each throw. The duration for which counter IC2 is active is determined by one of the two dual retriggerable monostables in IC12. R5 & C3, connected to pins 1, 2 & 3 of IC12, set the time for which output Q1 (pin 6) remains high. When it goes low, the counter is disabled and count is halted. This gives the basis for the dis­play mechanism. Similar circuitry is used to drive Display 2 (DIS2). IC3, IC13 and the other halves of IC2 and IC12 are involved instead and the capacitor and resistor values are altered such that the rate of change of count of DIS2 is slower than DIS1 and stops at a later time. DIS3 and DIS4 are driven by circuitry almost identical to that used for DIS1 & DIS2, again with alterations to resistor and capacitor values such that DIS3 stops counting before DIS4 but after DIS2. In driving the displays this way, random number combinations are generated. To obtain a sound effect which suggests the rolling of barrels, the VCO output of IC16 feeds to IC10a, a dual JK flip­flop. This drives a piezoelectric transducer to produce a click­ing sound for every count advance of the last display. The sound is stopped at the same time as count is halted by holding the reset input of the flipflop high when pin 9 of IC15 goes high. Magnitude comparators IC7, IC8, IC9 & IC17 are magnitude comparators and these compare the value of numbers displayed by DIS1 & DIS2, DIS2 & DIS3, DIS3 & DIS4, DIS4 & DIS1 respectively. This is done by comparing the BCD outputs of the respective 4518 counters and one can now appreciate why single counter/7-segment driver ICs (eg, 4026) were not used. The magnitude comparators are always enabled, with their “A = B” outputs going high whenever the two numbers being compared are equal. This may occur many times before all counting ceases. The four “A = B” outputs of the magnitude comparators are fed to IC20, a 4514 1-of-16 decoder and this device decodes and reg­isters the different winning combinations. Once all counting has ceased, the outputs of the magnitude comparators are fixed, dependent on the values in their respec­tive displays. For example, if DIS1, 2 & 3 are all equal, then IC7’s and IC8’s outputs will be high, whereas IC9’s and IC17’s outputs will be low. This represents a binary equivalent of decimal 3 at the inputs of IC20. Therefore, pin 8 will go high when the device is enabled by bringing the INH & FOLLOW pins (1 & 23) low. This is achieved by feeding the Q2bar output of IC15 (which goes high after all counting has ceased) into a delay circuit consisting of Schmitt trigger IC23a, resistor R18, capacitor C14 and diode D2. The output therefore goes low. The delay mechanism is necessary because, in addition to normal functioning, the 4518 will advance in count when EN (pins 2 or 10) is brought low whilst CLK (pins 1 or 9) is low. Thus, if IC20 is enabled at the same time as IC5 (4518) is disabled, (bringing EN low), there is a risk that an undesirable count occurs. This would result in two output pulses from IC20 as data fed into it from the magnitude comparators changed at that in­stant. Indeed, even with the delay mechanism in place, undesir­able counts can be observed as rapid advances in count just prior to stopping. Other winning combinations can be seen in Table 1, along with the decoded outputs and points given. As can be seen, there may be several possible outputs for any one winning combination type. The OR gates in Fig.2 (below): this is the circuitry for the display board. It mostly consists of BCD-to-7-segment decoder ICs (IC24IC32) and 7-segment LED displays. The input signals to drive the display board come from the main PC board. November 1998  41 Parts List 1 main PC board, 252 x 154mm 1 display PC board, 252 x 154mm 1 9V 1A DC plugpack supply 1 piezoelectric transducer; Jaycar AB-3440 or similar 1 pushbutton momentary action SPST switch 4 25mm spacers; Jaycar HP-0866 or similar 4 4 x 32mm screws & nuts to suit Semiconductors 2 555 timers (IC22,IC35) 1 4017 divide by 10 counter (IC34) 1 4002 dual 4-input NOR gate (IC18) 8 4026 counter/7-segment drivers (IC24, IC25, IC27-IC30, IC32, IC33) 1 4027 dual JK flipflop (IC10) 4 4046 phase locked loops (IC11,IC13,IC14,IC16) 3 4071 quad 2-input OR gates (IC21,IC26,IC31) 1 4081 quad 2-input AND gates (IC19) 1 4093 quad 2-input NAND Schmitt trigger (IC23) 4 4511 BCD to 7-segment decoder/drivers (IC1, IC3, IC4, IC6) 1 4514 1-of-16 decoder (IC20) 2 4518 dual BCD counters (IC2, IC5) 2 4528 dual monostables (IC12, IC15) 4 4585 magnitude comparators (IC7-IC9,IC17); Farnell 386522 IC21 ‘collate’ these before they are fed into the scoreboard array. IC18a goes high when all inputs are low, corresponding to a ‘0’ count. IC18b goes high when the ‘1’,‘2’ and ‘4’ binary lines fed into IC17 are low. Since the ‘8’ binary line may be high or low, the output of IC18b will be high on both count ‘8’ or ‘0’. These outputs are then fed into IC19a & IC19b along with output 15 (pin 15) of IC20 (which registers four of a kind). The outputs of IC19a and IC19b therefore constitute bonus winning combinations of 8888 and 0000, in 42  Silicon Chip 4 large 7-segment displays; Jaycar ZD-1850 or equivalent (DIS1-DIS4) 8 7-segment displays; Jaycar ZD-1855 or equivalent (DIS5DIS12) 3 red flashing LEDs (LED6,7,8) 2 orange flashing LEDs (LED4,LED5) 3 green flashing LEDs (LED1,LED2,LED3) 1 1N5404 diode (D1) 1 1N4004 diode (D2) 8 BC548 NPN transistors (Q1-Q8) 4 BC337 NPN transistors (Q9Q12) Capacitors 9 100µF 16VW electrolytic (C2, C6, C8-C10, C12, C14, C22, C24) 2 47µF 16VW electrolytic (C3,C4) 7 10µF 16VW electrolytic (C15-C21) 1 4.7µF 16VW electrolytic (C13) 1 2.2µF 16VW electrolytic (C23) 4 0.1µF (C1, C5, C7, C11) Resistors (0.25W, 1%) 4 10MΩ 1 56kΩ 1 680kΩ 1 47kΩ 2 560kΩ 1 33kΩ 1 470kΩ 8 22kΩ 1 150kΩ 2 15kΩ 4 100kΩ 1 1.2kΩ 1 82kΩ 6 390Ω 1 62kΩ 64 330Ω Miscellaneous Tinned copper wire, hook up wire, solder. addition to the six types listed in Table 1. When 8888 is attained, points are given as for 4 of a kind but also a bonus (1,000,000 points) is given. 0000 will attract an extra 10,000,000 points in addition to the points given for an 8888 combination. The score board array is simply eight repeating units of 7-segment displays driven by 4026 ICs and current-limiting resis­ tors, cascaded by a 10µF capacitor, 22kΩ resistor and 2-input OR gates. The respective winning outputs are fed into one input of each OR gate (except the first) and advances the count by one each time a winning combination is registered. The other input to the OR gate is from the divide-by-10 outputs of the previous 4026 IC. This divide-by-10 output goes high on the 9 to 0 transi­tion, stays high from 0 to 4, goes low on the 4 to 5 transition and stays low from 5 to 9. By staying high for count 0 to 4, the divide-by-10 outputs would inhibit the next counting unit from registering a win (positive clock edge). For this reason, the 10µF capacitor and 22kΩ resistor were included to generate a quick positive pulse to register the carry. This pulse would slowly return to ground as the capacitor charges, thereby allowing the count to proceed. This slow return to ground does not affect operation. Capacitor C22 and resistor R28 at pin 15 of the 4026s ensure that all scoreboard displays are reset when turned on. In addition to driving the scoreboard, each winning combi­ nation output drives a flashing LED via a transistor to indicate the win (Q1-Q8; LED1-LED8). Furthermore, the 4-ofa-kind winning combination output is fed into IC23d to get an inverted output, used to enable decade counter IC34. IC34 has its ‘0’, ‘1’, ‘2’ and ‘3’ outputs connected to the decimal points of the large displays and these will ‘chase’ whenever 4-of-a-kind is attained. IC35 provides the clock pulses for IC34. IC34 is self-reset by its ‘6’ output and hence, a delay between each pulse train re­sults. The output of IC19b is also fed into pin 4 (reset) of IC22. Normally, this will be low and so IC22 is in ‘reset’ and its pin 3 is low. IC23b then inverts this and so a positive signal is fed into the blanking inputs of all 4511 decoder ICs. However, when an 8888 or 0000 combination is attained, IC19b’s output will be high, effectively allowing the output of IC22 to act as an as­table and thereby causing all the large displays to flash on and off. This indicates the bonus win. Finally, resistors R29 and R30 light up the decimal points of DIS7 and DIS10, marking the thousand and million places respec­ tively. These resistors may be omitted during construction if desired. Next month we will publish the details of construction and troubleSC shooting.