Fullscreen HTML5Med Res (??MB)HTML4

Keep tabs on engine revolutions with this: 5-Digit Tachometer You asked for it and here it is: a highly flexible tachometer circuit that should cope with virtually any engine or rotating machinery. It has a crystal timebase and a resolution of one revolution per minute (1 rpm). Let’s face it, everyone loves those large tachometers with 270 degree movements. There is a strong temptation to make the needle sweep around the dial as you push down on the GO pedal. But while they look the part, traditional analog tachome­ters are not particularly accurate and have a very poor resolu­tion which means that you can’t precisely measure a particular 16  Silicon Chip engine speed such as 1450 rpm. For this reason, they cannot be used for accurately tuning an engine for correct mixture (done by adjusting for maximum idle speed) or procedures like setting the throttle switch for EFI engines. So there is a need for a digital tacho with much greater accuracy and resolution. Our new digital tachometer is Main Features   5-digit read out   1 rpm reso lution   crystal tim ebase   presettabl e digital mul tiplier for calibration   0.25 second update    facility fo r last digit to be locked on “0”   display ca n be dimmed for night time use   leading ze ro blanking mounted in a relatively large low profile case, measuring 225mm wide, 165mm deep and 40mm high. This is not the sort of project which could be easily integrated into your car’s dash By JOHN CLARKE board unless the small PC board with the 7-segment displays is mounted separately. But we’re getting way ahead of ourselves . . . Why such a large case? The answer is that a 5-digit tachometer is quite complex and no off-the-shelf ICs will do the job required. A custom microprocessor could but our previous experience with these sorts of projects indicates that our read­ers much prefer circuits with readily available ICs. Just to give an example of an IC that is relatively avail­able and could do most of the job, consider the National Semicon­ductor 74C926. This is a 4-digit counter with a multiplexed display. But we need five digits (or rather, you the readers, appear to want five digits) and the 74C926 does not have leading zero blanking. A tachometer without leading zero blanking looks pretty silly so that rules the 74C926 out of the picture. Sure, we could have added in leading zero blanking but then the advan­tages of a single chip 4-digit counter go out the window. So we have ended up with a relatively large PC board with quite a few ICs on it. Er, just how many are there? Well, 16 to be precise, not counting the 3-terminal regulator. But all the ICs are cheap and readily available. Above: this close-up view shows the board assembly mounted in the case before the front panel is fitted. Take care to ensure that the 7-segment LED displays are mounted correctly (decimal points to bottom right). OK, so we’ve been up-front about the size of the 5-Digit Tachometer and all its ICs, let’s describe its features. Features The SILICON CHIP 5-Digit Tacho­ meter will accurately read the revs of an engine or any rotating shaft with a resolution of 1 rpm and it will read high shaft speeds up to 60,000 rpm. The accuracy is a function of the crystal controlled timebase and the usual counter accuracy of ±1 digit. For example, a reading of 12,000 rpm would have an accuracy of ±1 rpm plus the timebase accuracy of say, Fig.1: the block diagram of the 5-Digit Tachometer. The main feature is the use of a phase lock loop and a programmable divider to frequency multiply the input signal. October 1997  17 18  Silicon Chip Fig.2 (left): the tachometer uses five decade counters to provide a 5-digit display. The diode OR gates provide leading zero blanking for the four most significant digits. less than 50 parts per million, which is negligible in this application. Making a tachometer to suit a wide range of engines is a real problem because you have to cater for so many cylinder, coil and 2-stroke/4-stroke combinations. Just to give you an idea of the complexity involved, we have had to cater for 1, 2, 3, 4, 5, 6, 8, 10 and 12-cylinder engines with single and multi-ignition coil combinations and 2-stroke and 4-stroke engines. Doubtless there’ll be some engines we have omitted but we can’t think of any. Catering for all these possibilities is provided by DIP switches and two links on the PC board. The new tacho’s input circuitry can accept high voltage from the primary winding of an ignition coil or small signals from a shaft position sensor or engine management tachometer output. And if you have a TAI or CDI system, you would also feed the low-voltage signal from the points, Hall effect sensor or reluctor pickup to the low-signal input. The tachometer can also be set to allow for one pulse per shaft revolution to a maximum of 60. The rpm measurement update time is one quarter of a second so there will be a new reading four times each second. In cases where the machine or engine rotation is not stable, the last display digit can fluctuate widely which makes it difficult to take a sensible reading. To cope with this situa­tion, we have provided a facility to lock the last digit to 0 if required. In this case the reading resolution will be reduced to 10 rpm. Frequency multiplication Measuring shaft rpm with a high resolution can be difficult since most motors rotate rather slowly, in electronic terms. For example, a shaft turning at 1000 rpm with one trigger pulse per revolution will provide a signal frequency of 1000/60 Hz or 16.67Hz to the tachometer. A normal frequency counter circuit with a 1-second count period will simply display a read­ing of 16 or 17. This is equivalent to 1Hz or only 60 rpm October 1997  19 Fig.3: these oscilloscope waveforms show the frequency multiplier action of the PLL (IC2). At top (Ch1) is the input waveform at pin 14. Ch2 is the VCO output while the Ref1 waveform is the comparator input at pin 3. Note that the input and comparator signals are in phase and at the same frequency. The VCO is shown multiplying by 10. The lowest trace (Ref2) is the error signal at pin 9. resolu­tion. If it was to display in rpm rather than Hz, then the count period would need to be one minute which is clearly not practi­cal. To obtain a tachometer with an update time of less than one second, the measured pulse signal frequency would need to be at least 60 times greater. This can be done in one of two ways. Firstly, we could sense the shaft rotation with a slotted vane which provides many pulses per revolution but this is not really an easy option. The second option is to multiply the pulse signal electron­ ically and this method is used in the SILICON CHIP 5-Digit Tachometer. Since our tacho­meter has an update time of one quar­ter of a second (250ms) and an actual counting period of 125ms, the multiplication factor for one pulse per shaft revolution is 60 x 8 or 480. Where there are more pulses per shaft rotation (eg, two for a 4-cylinder 4-stroke), then the multiplication factor can be reduced. Fig.1 shows the block diagram of the 5-Digit Tachometer. The input signal is conditioned by filtering to prevent false triggering on noisy signals and then squared up with a Schmitt trigger. The resulting signal is passed to a frequency multiplier consisting of a phase lock loop and a programmable divider. The oscillator output from the phase lock loop is fed through the programmable divider and the divided output is compared in the phase lock loop against the input signal. Hence the phase lock loop “locks” the multiplied frequency output to the input signal. The multiplied frequency is fed to the 5-digit counter and a crystal oscillator provides the “housekeeping”; ie, reset and latch enable signals. The phase lock loop signal is counted over a 125ms period, latched and then reset, ready for the next count sequence. The latched count is shown on the five digit display. Display dimming is included for night-time use. Circuit details Fig.4: timing waveforms for the counter circuitry. When Q13 of IC14 is low, NAND gate IC15d inverts this and enables the clock on IC5b. Thus counting in IC5b and following counters can start. When Q13 of IC14 goes high, the enable input to IC5b goes low and counting stops. IC15c inverts this to produce a low signal to the latch enable inputs on IC8 to IC12 via the .001µF capacitor. The value counted by IC5b to IC7b is then latched and displayed. 20  Silicon Chip The full circuit for the 5-Digit Tachometer is shown in Fig.2. Starting at the top lefthand corner of the circuit, the signal from an ignition coil is divided down with 22kΩ and 10kΩ resistors. The .056µF capacitor rolls off signals above about 400Hz and the filtered signal is then AC-coupled to the base of Q1. The 10kΩ resistor between base and emitter holds Q1 off in the absence of a voltage on the ignition coil input. The 1.2kΩ resis­tor at Q1’s base is there to provide a low voltage signal input point which can drive the transistor with as little as 1V peak-to-peak. The collector of Q1 is pulled to the 8V supply via a 10kΩ resistor and its output is filtered with another .056µF capacitor. IC1 is an LM393 dual comparator with only one section used in our circuit. The comparator is connected as a Schmitt trigger with hysteresis set by positive feedback between the output at pin 7 and the non-inverting input at pin 5. The pin 7 output is an open collector transistor and when it is off, the 1.2kΩ resis­tor pulls it high. A voltage divider at the non-inverting input (pin 5), formed by the two 10kΩ resistors across the supply and the 10kΩ feedback resistor, sets this input at +5.23V. The signal from Q1’s collector must go higher than this to drive the comparator output at pin 7 low. When the output is low, the same voltage divider action sets the non-inverting input at +2.77V and so the collector of Q1 must go below this voltage before IC1’s output will again go high. The wide hysteresis (about 2.5V) on IC1 ensures that any noise on Q1’s collector will be ignored. Phase lock loop Following IC1 is the phase lock loop (PLL), IC2. This oscillates at a maximum frequency set by the 100pF capacitor and resistor at pin 11. The actual frequency is controlled by the input voltage at pin 9. When pin 9 is at the full supply voltage, the oscillator runs at the maximum rate. When pin 9 is close to 0V, the oscillator runs at its slowest speed. This is nominally more than 100 times slower than the maximum rate. The PLL’s oscillator output at pin 4 is fed to program­mable dividers IC3 and IC4. IC3 divides from 1 to 15, depending on the switch settings on DIP1-DIP4. If only DIP1 is set high, the IC divides by 1. When all switches are closed, the IC divides by 15. IC4 divides by 16 when only DIP5 is closed and this increases to 255 when DIP5-DIP8 are all closed. Thus, when IC3 and IC4 are used together, we can divide from 1 up to 255 + 15, or a total of up to 270 in steps of 1. Fig.5: these oscilloscope waveforms show the timebase circuitry in action. The top trace shows the enable signal to pin 10 of IC5b. The second trace is the clock signal (pin 9) which is counted when pin 10 is high. The low pulse on the third trace latches the counted data into IC8, IC9, IC10 and IC11. The posi­tive edge of the pulse clocks D-flipflop IC16. The reset pulse on the fourth trace resets counters IC5b-IC7b. The output from the programmable dividers is passed to the enable input of IC5a. This is a binary coded decimal (BCD) coun­ter which divides by 10 at its Q4 output. With the inclusion of IC5a, the overall division can be up to 2700. There are two link options, with LK1 selecting divide by 10 and LK2 selecting divide by 1. Following IC5a, the divided signal is applied to the com­parator input of the PLL at pin 3 and this is compared with the tacho input signal at pin 14. The PLL produces an error signal at pin 13 which after filtering is applied to the voltage controlled oscillator input at pin 9. The rate at which the PLL tracks the incoming signal is set by the filter components at pin 9. The 6.8µF capacitor in con­junction with the 180kΩ resistor sets the lowest frequency for Specifications Readout range ������������������������������ >100 to 1 Maximum reading �������������������������� nominal 60,000 rpm with 0.25 second update Multiplier settings �������������������������� from x1 to x270 in steps of 1; x270 to x2700 in steps of 10 Resolution ������������������������������������� 1 rpm maximum or 10 rpm if last digit locked on 0 Accuracy ��������������������������������������� ±1 digit (crystal locked) Count period ��������������������������������� 0.125s (1/8s) Update period ������������������������������� 0.25s (1/4s) Input sensitivity ������������������������������ 3V p-p on ignition coil input and 1V p-p on low signal input Maximum Input Voltage ����������������� 600V on ignition coil input, 120V on low signal input October 1997  21 Parts List For 5-Digit Tachometer 1 PC board, code 04310971, 198 x 155mm 1 PC board, code 04310972, 104 x 24mm 1 front panel label, 215 x 32mm 1 plastic case, 225 x 165 x 40mm 1 clear red plastic sheet, 74 x 19 x 2mm 1 mini TO-220 heatsink, 20 x 20 x 9.5mm 1 3mm screw and nut for heatsink 4 12G x 10mm self-tapping screws 4 6mm metal spacers 1 small cordgrip grommet 5 PC stakes 2 4-way DIP switches (DIP1DIP4 & DIP5-DIP6) 1 2m length of 0.8mm tinned copper wire 1 32.768kHz crystal (X1) Semiconductors 5 HDSP5303 common cathode 12.5mm LED displays (DISP1-DISP5) 1 7808 8V positive regulator (REG1) 1 LM393 dual comparator (IC1) 1 4046 phase lock loop (IC2) 2 4526 programmable binary dividers (IC3, IC4) 3 4518 dual BCD counters (IC5IC7) which it will lock, while the 4.7kΩ resistor in series with the 6.8µF capacitor improves the response time when the circuit locks. The oscilloscope waveforms in Fig.3 show the PLL (IC2) in action. At top (Ch1) is the input waveform at pin 14. Ch2 is the VCO output while the Ref1 waveform is the comparator input at pin 3. Note that the input and comparator signals are in phase and at the same frequency. The VCO is shown multiplying by 10. The lowest trace (Ref2) is the error signal at pin 9. 4-bit counters The VCO output from IC2 clocks the second 4-bit BCD counter in IC5; ie, IC5b. Its outputs at Q1-Q4 are decoded by IC8 which is a 4511 BCD to 7-seg22  Silicon Chip 5 4511 BCD to 7-segment LED decoders (IC8-IC12) 1 4071 quad OR gate (IC13) 1 4060 binary counter (IC14) 1 4093 quad Schmitt NAND gate (IC15) 1 4076 quad flipflop (IC16) 3 BC338 NPN transistors (Q1Q3) 2 1N4004 1A diodes (D1,D21) 19 1N914, 1N4148 switching diodes (D2-D20) 1 16V 1W zener diode (ZD1) Capacitors 1 1000µF 16VW PC electrolytic 2 100µF 16VW PC electrolytic 1 6.8µF 16VW PC electrolytic 1 1µF MKT polyester 9 0.1µF MKT polyester 2 .056µF MKT polyester 3 .001µF MKT polyester 1 100pF MKT polyester or NP0 ceramic 2 22pF NP0 ceramic Resistors (0.25W 1%) 1 10MΩ 1 4.7kΩ 1 180kΩ 3 1.2kΩ 1 150kΩ 35 680Ω 1 22kΩ 1W 1 1.2Ω 25 10kΩ Miscellaneous Hookup wire, connectors, solder, etc. ment LED display driver. Thus, the LED display shows the count value from IC5b. The divide-by-10 output at Q4 of IC5b clocks the following IC6a counter at its enable input, pin 2. Similarly, IC6b, IC7a and IC7b are clocked from the Q4 outputs of the previous counter stage. Each of these counters drives its own 7-segment decoder (IC10-IC12). Leading zero blanking Diodes D2-D17, IC13 and IC16 provide leading zero blanking for the LED displays. This means that instead of the display indicating 00651, for example, it will only show 651, with the leading two zeros unlit. This makes the display far easier to read. The leading zero blanking works by monitoring the Q1-Q4 count outputs of the 4518 counters (ie, IC6a-IC7b) via the diodes which are connected as OR gates. If the BCD output from IC7b is zero (ie, outputs Q1-Q4 low), then the common cathode connection of diodes D14 -D17 will be held low via the 10kΩ resistor connecting this point to ground. This low level is applied to data input DD of quad D flipflop IC16. The corresponding QD output when clocked at pin 7 applies a low to the blanking input of IC12 at pin 4 to turn off the display. IC13b is a 2-input OR gate which monitors the diode OR gate D10-D13 for IC7a and the D14-D17 diode OR gate signal via IC13a. If both inputs to IC13b are low, then its pin 11 is low. This low output is applied to the DA input of IC16 and is clocked to the QA output and thence to the blanking input of IC11. If there is other than a zero count at least one diode will pull an input of IC13b high to prevent blanking. A similar scenario occurs with IC6b, IC6a and the associated diodes driving IC13c and IC13d. Note that the blanking circuit relies on the information from the most significant digits. If for example, IC13a’s output is high due to a count higher than zero for IC7b, the IC13b, IC13a and IC13d OR gates will have high outputs and no blanking will occur. Thus as soon as a more sig­nificant digit has a count more than 1, the following less sig­nificant digits cannot be blanked. IC16 is used to latch in the leading zero blanking after the IC6a to IC7b counters have counted the signal from IC2. If these blanking signals were not latched, then the leading zero feature would be lost as the counters made their next count from zero. Timing A 32.768kHz crystal oscillator is formed across the invert­er at pins 10 and 11 of IC14. The 10MΩ resistor biases the invert­er while the 150kΩ resistor and the 22pF capacitors across the crystal prevent it from oscillating in a faster spurious mode. The Q12 and Q13 outputs of IC14 produce 4Hz and 2Hz respectively. Fig.4 shows the timing waveforms for the counter circuitry. When Q13 of IC14 is low, NAND gate IC15d inverts this and enables the clock on IC5b. Thus counting in IC5b and the This view shows how the board assembly mounts inside the case. The two 4-way DIP switches are used to set the PLL multi­plication ratio so that the unit can be made to work with virtually any 2-stroke or 4-stroke engine. following counters can start. When Q13 of IC14 goes high, the enable input to IC5b goes low and counting stops. IC15c inverts this to produce a low signal to the latch enable inputs on IC8-IC12 via the .001µF capacitor. The value counted by IC5b-IC7b is then latched and displayed. The .001µF capacitor charges via the 10kΩ resistor to the positive supply and the rising edge clocks the leading zero data on DA-DD on IC16 to the QA-QD outputs. Diode D19 prevents the pin 7 input of IC16 going above the positive supply when IC15c’s output goes high again. When both Q12 and Q13 of IC14 go high, the pin 3 output of NAND gate IC15a goes low. The resulting high on the pin 4 output of IC15b resets the 4518 counters via the .001µF capacitor. Diode D18 prevents excursions below ground when IC15b goes low. The 10kΩ resistor and .001µF capac- itor between the output of IC15a and the input to IC15b produce a short delay to prevent unwanted resets as Q12 goes low and Q13 goes high at the end of the count se­quence. The oscilloscope waveforms of Fig.5 show the timebase cir­ cuitry in action. The top trace shows the enable signal to pin 10 of IC5b. The second trace is the clock signal (pin 9) which is counted when pin 10 is high. The low pulse on the third trace latches the counted data into IC8, IC9, IC10 and IC11. The posi­tive edge of the pulse clocks D-flipflop IC16. The reset pulse on the fourth trace resets counters IC5b-IC7b. Display dimming The 7-segment displays DISP1 to DISP5 have their common cathodes connected to the collector of Q3. If transistor Q2 is off, then Q3 is turned on via the 1.2kΩ base resistor. This provides the full brightness to the displays via their 680Ω anode resistors. Diode D20 and transistor Q2 provide the dimming control feature. Diode D20 feeds a 1024Hz signal from pin 5 of IC14 to the input of Q2. When the Q5 output of IC14 is low, the base of Q2 is momentarily pulled low via the 0.1µF capacitor, switching off the transistor and allowing Q3 to turn on and light the display. The 0.1µF capacitor charges up via the 10kΩ base resistor on Q2 and so the transistor turns on again, turning Q3 and the displays off. Since the displays are turned on and off at 1024Hz there is no apparent flicker and the proportion that Q3 is on sets the brightness. This is determined by the 0.1µF capacitor value and this can be increased for a brighter display. Power for the circuit comes from the 12V battery in a car or a 12V DC 500mA plugpack. Diode D21 prevents a reversed polari­ty connection from damaging the circuit. A 1000µF capacitor filters the supply, while a October 1997  23 1.2Ω resistor decouples the supply from transients which are shunted using 16V 1W zener diode ZD1. The 7808 regulator provides the 8V supply for the circuit. Two 100µF capacitors decouple the input and output for the regulator and nine 0.1µF capacitors help bypass the supply lines on the PC board. housed in a plastic instrument case measuring 225 x 165 x 40mm. You can begin construction by checking the PC boards for etching defects such as shorts between tracks and undrilled holes. These should be fixed before inserting any compo- Table 1: Capacitor Codes Construction The 5-Digit Tachometer is constructed on two PC boards. The main PC board is coded 04310971 and measures 198 x 155mm, while the display PC board is coded 04310972 and measures 104 x 24mm. The display is designed to attach at rightangles to the main PC board. As already noted, the tachometer is nents. Then insert and solder in all the links as shown on the component overlay diagram of Fig.6. Next, insert and solder in all the resistors. You can use the accompanying resistor colour codes in Table 2 as a guide to selecting the correct values. Better still, check each value with your digital multimeter before soldering it in. The ICs and DIP switches can be installed next, taking care with their orienta­tion. Be sure to put the correct IC in each position. When soldering in the diodes, note that D21 and D1 (both 1N4004) are larger bodied than the others (1N914s). Take care with their orientation. Insert the capacitors and note that the electrolytic capacitors need to be inserted with the polarity ❏ ❏ ❏ ❏ ❏ ❏ ❏ Value IEC Code EIA Code 1µF    1u  105 0.1µF   100n   104 .056µF   56n  563 .001µF    1n  102 100pF   100p   101 22pF   22p   22 Table 2: Resistor Colour Codes ❏ No. ❏  1 ❏  1 ❏  1 ❏  1 ❏ 25 ❏  1 ❏  3 ❏ 35 ❏  1 24  Silicon Chip Value 10MΩ 180kΩ 150kΩ 22kΩ 10kΩ 4.7kΩ 1.2kΩ 680Ω 1.2Ω 4-Band Code (1%) brown black blue brown brown grey yellow brown brown green yellow brown red red orange brown brown black orange brown yellow violet red brown brown red red brown blue grey brown brown brown red gold brown 5-Band Code (1%) brown black black green brown brown grey black orange brown brown green black orange brown red red black red brown brown black black red brown yellow violet black brown brown brown red black brown brown blue grey black black brown brown red black silver brown Fig.6: this diagram shows the component layout on the main and display PC boards. When mounting the LED displays on the small board, make sure that the decimal points are located in the bottom righthand corner. shown. Table 1 shows the codes which will be shown on MKT and ceramic capacitors. The 3-terminal regulator REG1 is mounted horizontally with its metal face towards the PC board and a small heatsink beneath it. Bend the leads before inserting it into place. It is secured with a screw and nut. Next, insert the PC stakes, transistors and the crystal. When inserting the displays on the smaller PC board be sure that the decimal point is located in the bottom righthand corner. Note that the decimal points are not used in this circuit. Case work Attention can now be turned to the case. First, temporarily place the main board in position and check October 1997  25 96 Testing times 12 6 80 - 8 60 - 10 48 - 12 40 Checked all your work carefully against the wiring diagram? If so, apply 12V to the board and check that the display shows a 0 or 1 on the righthand digit. If not, immediately disconnect power and check for errors such as reverse polarity connection of power or incorrectly placed components. When the circuit is operating, the supply to each IC should be 8V. You can check this by connecting one side of your multimeter to the ground PC stake and measuring pin 16 on IC2-12, IC14 & IC16; pin 14 on IC13 & IC15; and pin 8 on IC1. You can set the DIP switches according to Tables 3 & 4 to suit your application. Note that at least one switch must be set to ON or the programmable divider will not operate. Note also that either LK1 or LK2 must be present on the board (but not both), otherwise IC5a will malfunction. You can check that the tachometer operates by applying a signal from a function generator to the input. You may need to use the low signal input for this. Alternatively, simply pulling pin 9 of IC2 to 8V will cause the PLL oscillator to run at maxi­mum and so display a reading. Test that the display dims when the dimming input is connected to 12V. 0.5 960 2 1 480 3 1.5 320 4 2 240 5 2.5 192 6 3 160 Table 4: Switch & Link Settings (LK1 = 10x, LK2 = 1x) Multiplier DIP 87654321 LK1, LK2 x960 01100000 yes, no x480 00110000 yes, no x320 00100000 yes, no x240 00011000 yes, no x192 11000000 no, yes x160 10100000 no, yes x160 00010000 yes, no x120 00001100 yes, no x96 01100000 no, yes x80 01010000 no, yes x80 00001000 yes, no x60 00000110 yes, no x48 00110000 no, yes x40 00000100 yes, no the location of the display PC board. Now, using a drill larger than 10mm, remove the two integral mounting pillars in the base of the case which would otherwise foul the display PC board when it is placed in position. Place the main PC board in position over the integral standoffs, using 6mm spacers to raise it, Secure it with self-tapping screws. Now place the display PC board vertically in position and mark the rear of this board where the main PC board makes contact. Remove both PC boards and tack solder them togeth­er at the large copper areas. Make sure they are at 26  Silicon Chip Vehicle installation The tachometer can be installed into a vehicle using auto­ m otive connectors to make the connections to the ignition posi­tive supply, the lights circuit for dimming and the coil terminal. The ground connection can be made to the chassis with an eyelet and self-tapping screw. Where access to the coil primary is impossible with the modern style of combined coil and transistor, you Fig.7: this full-size front panel artwork can be used as a template to make the cutout for the LED displays. 120 5 1 RPM 4 10 4-stroke: Multiplier Pulses Per Number Of (0.125s count Shaft Rotation Cylinders/Coil period) DIGITAL TACHOMETER 8 right angles and check the positioning by placing into the box again. If correct, solder all matching copper tracks. Apply a liberal fillet of solder to the large copper areas to improve mechanical strength. Next, drill the rear panel for the cordgrip grommet. The front panel requires a rectangular cutout for the display window and this can be made by making a series of holes around the hole perimeter and then filing it to shape, so that the red plastic window fits tightly in place. Table 3: Muliplier Ratio For Various Engines & Shaft Pickups can pick up a suitable signal from the tachometer output lead of your engine management computer. The signal connects to the low signal input. It is calibrated as normal, taking the number of engine cylinders into account. Fig.8: this is the full-size etching pattern for the two PC boards. In some installations, it may be eas­ ier to keep the main PC board separate from the display board and connect with multi-way cable. This will allow the display to be mounted in a confined space. If the tachometer is to be used on stationary machinery, a suitable shaft rotation sensor may be required. These are normal­ly a metal vane with several notches which trigger a Hall effect switch or optical pickup. Last digit lock If you wish to lock the last digit on zero to prevent it continuously fluctuating, the PC board will require a small modification. Pins 3 & 4 of IC8 should be disconnected from the +8V supply using a knife to break the track in the thinned out section. Then make a solder bridge from the track leading to pins 3 & 4 to the ground at pin 8. Finally, break the track leading to the “g” segment of DISP1 in the thinned section under the seven 680Ω SC resistors. October 1997  27