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Capacitance adaptor for your D This clever adaptor circuit plugs into your digital multimeter and can measure capacitance up to 2.2 microfarads. by JOHN CLARKE & GREG SWAIN The capacitance adaptor is plugged directly into the DMM terminals. Below is a view inside the PCB version. 20 SILICON CHIP When was the last time you had trouble deciphering a capacitor label? The fact is, it's all too easy to misinterpret capacitor markings. And that's something you can't afford when building projects. A capacitance meter neatly solves this problem. You simply plug the unknown capacitor into the test terminals and read the value in picofarads (pF) or microfarads (µF} directly from the digital display. You can also use a capacitance meter to check suspect or unmarked capacitors and to select critical capacitor values. If you have a digital multimeter (DMM), you may already have a capacitance meter. Many DMMs now include capacitance ranges as standard, and these can typically check values up to about 20µF. If your digital multimeter doesn't have a capacitance facility, this simple adaptor circuit is for you. It plugs directly into the DMM's terminals and can measure values up to 2.2µF in two ranges: 0-2200pF (.0022µF) and 0-2.2µF. Don't be worried by the 2.2µF upper limit - capacitors with values greater than 2.2µF are usually clearly marked and seldom require testing. Note that this adaptor is only +SV 1 T 16VW_I:- 9V : .,. ...L. HIGH LDWO S2a "} VR3 47k NULL ADJUST ON/OFF..,. 3 (b) Cl 390pF+ 2.2 16VW + + - 03 .04 7 t VRl 100k LOW ADJUST TO METER VR2 470(! HIGH ADJUS 1M + ex DMM CAPACITANCE METER 041-1287 LOW : 0pF-.0022uF HIGH : 0·2.2uF LID OF CASE 1- The circuit is based on a single 74HC132 quad NAND Schmitt trigger. It produces a voltage which is directly proportional to the test capacitance Cx. suitable for use with digital multimeters. It cannot be used with analog meters because of their much lower input impedance. Note: digital multimeters usually have a fixed input impedance of 10 megohms. The circuit The circuit is basically a capacitance to voltage converter. You plug a capacitor in, the circuit produces voltage which is directly proportional to the capacitance, and the value is indicated by the digital multimeter. On the lower range, the circuit produces an output of one millivolt per picofarad of capcitance; on the upper range, it produces one volt per microfarad. Just two active devices are used by the circuit: a 74HC132 quad NAND Schmitt trigger (ICl} and a 5V regulator. ICla forms a free-running oscillator with VRl providing frequency adjustment. The square wave output of this oscillator is fed to two inverters, ICl b and IClc. The test capacitor Cx is connected to one of the inputs of IClc. Cx charges via Dl during positive half-cycles of the oscillator waveform and discharges on negative half-cycles via one of two resistance values. On the LOW range, Cx discharges via the lMO resistor, which is connected permanently in circuit. On the HIGH range, Cx discharges via VR2 and its series 6800 resistor (and also via the lM0 resistor which is now in parallel). Now look at ICl b. On the HIGH range, the output of ICla is connected directly to the pin 1 input of ICl b. So the output of ICl bis simply a mirror of the output of ICla. And with no capacitor across the Cx terminals, the output of IClc is virtually identical to that of IClb. If we were to measure the absolute voltage difference between these two outputs, the result would be zero. Now consider what happens when a capacitor is connected across the Cx terminals. Cx charges quickly via Dl and discharges slowly via VR2 and the 6800 resistor. This means that the input to IClc stays high for longer than l.t stays low, depending on the size of the capacitor. So the output waveform from Cx is a series of pulses at the same frequency as ICla but with pulse length inversely proportional to the size of Cx. This is illustrated in Fig.1 . If Cx is PARTS LIST 1 PCB, code SC041-1287, 44 x 62mm (or Veroboard 44 x 62mm) 1 plastic case, 83 x 54 x 28mm 1 Scotchcal label, 50 x 80mm 4 banana plugs (2 red, 2 black) 2 banana panel sockets (1 red, 1 black) 2 alligator clips (1 red, 1 black) 1 DPDT toggle switch 1 SPDT toggle switch 1 9V battery 1 battery clip Semiconductors 1 7 4HC132 quad Schmitt NAND gate (don't substitute) 1 78L05 3-terminal regulator 3 1N914, 1N4148 diodes Capacitors 1 1 OµF 1 6VW electrolytic 1 2 .2µF 16VW electrolytic 1 1µF 16VW electrolytic 1 0.22µF metallised polyester 1 .04 7 µF metallised polyester 1 390pF polystyrene Resistors (0.25W, 5%) 1 x 4 . ?MO, 1 x 1 MO, 2 x 120k0, 1 x 1 OkO, 1 x 6800, 1 x 1 OOkO miniature vertical trimpot, 1 x 4 7k0 miniature vertical trimpot, 1 x 4 700 miniature vertical trimpot. Miscellaneous Rainbow cable, solder, calibration capacitors. relatively large, the positive pulses on pin 8 of IClc will be very short. This is shown as pulse waveform (c).Now, if we measure the averaged difference between waveforms (b) and (c ), we get a voltage which is proportional to the capacitance of Cx. These pulses are filtered by a dual RC filter (10k0 and 2.2µF, and 120k0 and 0.22µF} to give a smooth DC voltage. This voltage is then measured by the DMM which gives a direct readout of the capacitor value. Sadly, things become more complicated when we switch to the LOW range. The bugbear is stray capacitance across the Cx terminals. Without some correction for stray capacitance, measurements of low value capacitors will NOVEMBER 1987 21 (a) (a) (b) (b) (c) Jl___n_n_n__r (11-c) (c) (11-c) STRAY CAPACITANCE ONLY Rg. 1 Fig.I - this waveform timing diagram applies to the HIGH range. Fig.2 - waveform timing diagrams for the LOW range. The positive pulses at (b) and (c) are shorter than at (a) due to capacitor Cl and the stray capacitance at the Cx input. (c) (b·C) n n n ____. ..______. ..______. _ InL Fig. 2 WITH CAPACITANCE ex CAPACITANCE METER Parts layout and wiring diagram for the PC version. Make sure that the IC, diodes and 3-terminal regulator are correctly oriented. have serious errors. Here is where the null circuit comes into play. When S2a selects the LOW range, the output of IC1a is fed to pin 1 of ICl b via diode D2 to charge the 390pF capacitor, Cl. Cl charges quickly via D2 and discharges more slowly via VR3. So the input to pin 1 stays high for a short period, each time pin 6 of ICla switches low. The result is that the positive pulses from the output of IC1 b are slightly shorter than they otherwise would be. This is shown in (b) of Fig.2. (Look closely, it is not apparent at first glance.) Waveform (c) shows the output of IClc with only stray capacitance at the Cx input (ie, no test capacitor connected). The stray capacitance is charged via Dl and discharges via the lM0 resistor. Hence, the positive pulses from the output of IClc are also slightly shorter than they otherwise would be (if there was no stray capacitance). VR3 is the null adjustment. It is set so that the positive-going edge of 22 SILICON CHIP waveform (b) coincides with the positive-going edge of (c) (ie, the delay times are made equal). Thus, if we measure the voltage between (b) and (c ), we will get a zero reading since both waveforms are identical. This is shown in Fig.2 as waveform (b-c). Thus, the effect of stray capacitance is cancelled out. We're not out of the woods yet. Offset voltage When the LOW range is selected, D3 and its series 4. 7M0 resistor are also switched into circuit. D3 feeds the square wave output of IC1c to a voltage divider consisting of the 4. 7M0 resistor and the lOk0 resistor on pin 8 of IC1c. Actually, D3 is forward biased only when the output of ICl b exceeds 3.1 V, and is reverse biased when the output drops below 3.1V. As a result, a fixed + 5mV offset appears on the negative output terminal (ie, the negative terminal is jacked up by 5mV). To null the circuit, the voltage on the positive ter- 0 ON OpF0.0022uF LOW 0 0 0-2.2uF HIGH 0 This actual size artwork can be used as a drilling template for the front panel. minal must also be increased by 5mV. This is achieved by adjusting VR3 so that ICl b actually triggers high before IC1c triggers. Why has this been done? The reason is that the offset voltage overcomes a tendency for ICl b and IClc to lock together when their respective trigger points are close. By adding the 5mV offset, the circuit is nulled with ICl b set to trigger well before IClc. This eliminates the locking problem. On the HIGH range, the stray capacitance is insignificant corn- pared to the Cx value and the nulling circuit is disabled by shorting VR3 with S2a. Similarly, the offset voltage circuit is no longer required and D3 is disconnected by S2b. OK, we're now out of the woods. Power for the circuit is derived from a 9V battery. A 78105 3-terminal regulator provides a regulated + 5V rail so that the oscillator and nulling circuits remain in calibration over the life of the battery. Note that a high speed CMOS NAND gate IC (type 74HC132) should be used in this circuit since this type of IC has shorter propagation times than standard CMOS. This is particularly important when measuring low capacitor values on each range. This is the view inside the Veroboard version. Take great care if you elect to use Veroboard as it is very easy to make a mistake. Construction We built two versions of the DMM Capacitance Meter - one on Veroboard and the other on a small PC board. Both versions fit into a small plastic case measuring 83 x 54 x 28mm. They are plugged into the DMM test terminals by means of banana plugs which protrude through the rear of the case. The lid of the case carries two banana panel sockets and the range and power switches. The test capacitor is connected by alligator clip leads attached to banana plugs which plug into the panel sockets. Although two versions of this project are shown, we strongly recommend that readers build the PCB version. Use Veroboard only if you want to save money and you are an experienced constructor (it's very easy to make a mistake with Veroboard). Cuts in the Veroboard tracks can be made using an over- Above: actual-size PC artwork. 0 0 t~~a:;:,='-"'ii--l 0 0 0 0 The wiring diagram for the Veroboard version. Cuts in the board tracks can be made using an oversize drill bit. size drill bit. Install the resistors, capacitors and trimpots on the board first, followed by the IC and the 3-terminal regulator. Make sure that all polarised parts are correctly oriented. These include the IC, diodes, 3-terminal regulator and electrolytic capacitors. The banana plugs are soldered to the underside of the board as shown in the photographs and further secured using the screw-on insulated mouldings. It will be necessary to cut the mouldings to a length of 6mm so that the battery will fit in the case. We used a self-adhesive label for the front panel and this item will probably be supplied in most kits. Trim the label to size using a pair of (Continued on page 96) The battery is sandwiched between the front panel and the circuit board. Use insulation tape to prevent shorts. NOVEMBER 1987 23 CEN'l Cash in your surplus gear. Advertise it here in Silicon Chip. Advertising rates for this page: Classified ads - $7 .00 for up to 15 words plus 40 cents for each additional word; Display ads (casual rate) - $20 per column centimetre (max. 10cm). Closing date: five weeks prior to month of sale. If you use a PO Box number, you must include your permanent address and phone number for our files . We cannot accept ads submitted without th is information . To run your own classified ad , put one word on each of the lines below and send this form with your payment to: Silicon Chip Classifieds , PO Box 139, Collaroy Beach , NSW 2097 . PLEASE PRINT EACH WORD SEPARATELY, IN BLOCK LETTERS 6 2 3 4 5 7 8 9 10 Our advertisers are vital to the success of Silicon Chip . Please give them your support. Altronics . . . 36,37 ,52 , 53,60 ,61 Arista Electronics ..... .. 64 Australian Geographic . IBC Dick Smith Electronics . .. 18, 19,44,45,65, 75 11 12 13 14 15 ($7 .00) 16 ($7.40) 17 ($7.80) 18 ($8.20) 19 ($860) 20 ($9.00) Elmeasco Instruments . . .. 81 Jaycar Electronics .... 24-32 Marantz Australia . . ... . . IFC Scan Audio Pty Ltd . OBC 21 ($9.40) 22 ($9.80) 23 ($10.20) 24 ($10.60) 25 ($11 .00) PC Boards 26 ($11.40) 27 ($11 .80) 28 ($12 .20) 29 ($12.60) 30 ($13.00) Name ....... .... ... ........ .... ... .... .... ......... ...... ...... ..... .. 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Capacitance adaptor for DMMs scissors, then carefully affix it to the front panel. The front panel can now be drilled to take the switches and test terminals. Alternatively, you can use the artwork reproduced with this article as a drilling template. The switches and terminals can then be labelled using Letraset rub-on lettering. Spray the finished panel with Estapol clear lacquer to stop the lettering from rubbing off. Next, mount the switches and test terminals and complete the wiring as shown in the diagrams. The case can now be drilled to accept the board assembly. Two 8mm holes are drilled in the rear panel to provide clearance for the banana plugs, while another three holes are 96 Advertisers Index SILICON CHIP ctd from page 23 drilled in the sides of the case to allow screwdriver access to the trimpots. The assembly goes together with the battery sandwiched between the board and the case lid (see photo). Strips of insulation tape can be used to prevent shorts between the battery case and the trimpot wipers. Calibration Calibration involves first setting the null adjustment (VR3), then adjusting VR 1 and VR2 so that the DMM displays the correct reading for capacitors of known value on the LOW and HIGH ranges respectively. To set the null control, set the DMM to the millivolt range, set S2 to LOW, and adjust VR3 for a reading of 0mV. In practice, it will be difficult to set VR3 so that the meter reads exactly zero, and a reading that is slightly negative will be satisfactory. Now connect a capacitor of known value between 1000 and 2200pF to the test terminals. Adjust VRl so that the meter displays lmV per picofarad (eg, if the capacitor value is l000pF, adjust the meter to read 1V). Finally, select the HIGH range and connect a 0.1-1/.tF capacitor to the test terminals. Adjust VR2 so that the meter displays 1V per microfarad (eg, 0.1V for a 0.1/.tF capacitor, 1V for a 1/.tF capacitor).